arm64: mm: Move ASID from TTBR0 to TTBR1
In preparation for mapping kernelspace and userspace with different ASIDs, move the ASID to TTBR1 and update switch_mm to context-switch TTBR0 via an invalid mapping (the zero page). Reviewed-by: Mark Rutland <mark.rutland@arm.com> Tested-by: Laura Abbott <labbott@redhat.com> Tested-by: Shanker Donthineni <shankerd@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -57,6 +57,13 @@ static inline void cpu_set_reserved_ttbr0(void)
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isb();
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}
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static inline void cpu_switch_mm(pgd_t *pgd, struct mm_struct *mm)
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{
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BUG_ON(pgd == swapper_pg_dir);
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cpu_set_reserved_ttbr0();
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cpu_do_switch_mm(virt_to_phys(pgd),mm);
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}
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/*
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* TCR.T0SZ value to use when the ID map is active. Usually equals
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* TCR_T0SZ(VA_BITS), unless system RAM is positioned very high in
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@ -272,6 +272,7 @@
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#define TCR_TG1_4K (UL(2) << TCR_TG1_SHIFT)
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#define TCR_TG1_64K (UL(3) << TCR_TG1_SHIFT)
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#define TCR_A1 (UL(1) << 22)
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#define TCR_ASID16 (UL(1) << 36)
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#define TCR_TBI0 (UL(1) << 37)
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#define TCR_HA (UL(1) << 39)
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@ -35,12 +35,6 @@ extern u64 cpu_do_resume(phys_addr_t ptr, u64 idmap_ttbr);
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#include <asm/memory.h>
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#define cpu_switch_mm(pgd,mm) \
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do { \
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BUG_ON(pgd == swapper_pg_dir); \
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cpu_do_switch_mm(virt_to_phys(pgd),mm); \
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} while (0)
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* __ASM_PROCFNS_H */
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@ -139,9 +139,12 @@ ENDPROC(cpu_do_resume)
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*/
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ENTRY(cpu_do_switch_mm)
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pre_ttbr0_update_workaround x0, x2, x3
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mrs x2, ttbr1_el1
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mmid x1, x1 // get mm->context.id
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bfi x0, x1, #48, #16 // set the ASID
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msr ttbr0_el1, x0 // set TTBR0
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bfi x2, x1, #48, #16 // set the ASID
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msr ttbr1_el1, x2 // in TTBR1 (since TCR.A1 is set)
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isb
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msr ttbr0_el1, x0 // now update TTBR0
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isb
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post_ttbr0_update_workaround
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ret
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@ -224,7 +227,7 @@ ENTRY(__cpu_setup)
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* both user and kernel.
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*/
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ldr x10, =TCR_TxSZ(VA_BITS) | TCR_CACHE_FLAGS | TCR_SMP_FLAGS | \
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TCR_TG_FLAGS | TCR_ASID16 | TCR_TBI0
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TCR_TG_FLAGS | TCR_ASID16 | TCR_TBI0 | TCR_A1
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tcr_set_idmap_t0sz x10, x9
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/*
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