RISC-V: self-contained IPI handling routine
Currently, the IPI handling routine riscv_software_interrupt() does not take any argument and also does not perform irq_enter()/irq_exit(). This patch makes IPI handling routine more self-contained by: 1. Passing "pt_regs *" argument 2. Explicitly doing irq_enter()/irq_exit() 3. Explicitly save/restore "pt_regs *" using set_irq_regs() With above changes, IPI handling routine does not depend on caller function to perform irq_enter()/irq_exit() and save/restore of "pt_regs *" hence its more self-contained. This also enables us to call IPI handling routine from IRQCHIP drivers. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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@ -13,7 +13,6 @@
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#define NR_IRQS 0
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void riscv_timer_interrupt(void);
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void riscv_software_interrupt(void);
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#include <asm-generic/irq.h>
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@ -28,6 +28,9 @@ void show_ipi_stats(struct seq_file *p, int prec);
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/* SMP initialization hook for setup_arch */
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void __init setup_smp(void);
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/* Called from C code, this handles an IPI. */
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void handle_IPI(struct pt_regs *regs);
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/* Hook for the generic smp_call_function_many() routine. */
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void arch_send_call_function_ipi_mask(struct cpumask *mask);
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@ -19,12 +19,15 @@ int arch_show_interrupts(struct seq_file *p, int prec)
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asmlinkage __visible void __irq_entry do_IRQ(struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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struct pt_regs *old_regs;
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irq_enter();
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switch (regs->cause & ~CAUSE_IRQ_FLAG) {
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case RV_IRQ_TIMER:
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old_regs = set_irq_regs(regs);
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irq_enter();
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riscv_timer_interrupt();
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irq_exit();
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set_irq_regs(old_regs);
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break;
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#ifdef CONFIG_SMP
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case RV_IRQ_SOFT:
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@ -32,19 +35,20 @@ asmlinkage __visible void __irq_entry do_IRQ(struct pt_regs *regs)
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* We only use software interrupts to pass IPIs, so if a non-SMP
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* system gets one, then we don't know what to do.
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*/
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riscv_software_interrupt();
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handle_IPI(regs);
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break;
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#endif
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case RV_IRQ_EXT:
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old_regs = set_irq_regs(regs);
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irq_enter();
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handle_arch_irq(regs);
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irq_exit();
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set_irq_regs(old_regs);
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break;
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default:
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pr_alert("unexpected interrupt cause 0x%lx", regs->cause);
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BUG();
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}
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irq_exit();
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set_irq_regs(old_regs);
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}
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void __init init_IRQ(void)
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@ -123,11 +123,14 @@ static inline void clear_ipi(void)
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clint_clear_ipi(cpuid_to_hartid_map(smp_processor_id()));
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}
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void riscv_software_interrupt(void)
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void handle_IPI(struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
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unsigned long *stats = ipi_data[smp_processor_id()].stats;
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irq_enter();
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clear_ipi();
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while (true) {
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@ -138,7 +141,7 @@ void riscv_software_interrupt(void)
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ops = xchg(pending_ipis, 0);
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if (ops == 0)
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return;
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goto done;
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if (ops & (1 << IPI_RESCHEDULE)) {
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stats[IPI_RESCHEDULE]++;
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@ -160,6 +163,10 @@ void riscv_software_interrupt(void)
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/* Order data access and bit testing. */
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mb();
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}
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done:
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irq_exit();
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set_irq_regs(old_regs);
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}
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static const char * const ipi_names[] = {
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