Merge Linux v5.14.17
Signed-off-by: Justin M. Forbes <jforbes@fedoraproject.org>
This commit is contained in:
commit
5849b37c11
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
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|||
# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
|
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PATCHLEVEL = 14
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SUBLEVEL = 16
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SUBLEVEL = 17
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EXTRAVERSION =
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NAME = Opossums on Parade
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|
|
|
@ -379,9 +379,6 @@ static int amba_device_try_add(struct amba_device *dev, struct resource *parent)
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void __iomem *tmp;
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int i, ret;
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WARN_ON(dev->irq[0] == (unsigned int)-1);
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WARN_ON(dev->irq[1] == (unsigned int)-1);
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ret = request_resource(parent, &dev->res);
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if (ret)
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goto err_out;
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|
|
|
@ -1073,8 +1073,6 @@ struct amdgpu_device {
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char product_name[32];
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char serial[20];
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struct amdgpu_autodump autodump;
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atomic_t throttling_logging_enabled;
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struct ratelimit_state throttling_logging_rs;
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uint32_t ras_hw_enabled;
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|
|
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@ -27,7 +27,6 @@
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#include <linux/pci.h>
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#include <linux/uaccess.h>
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#include <linux/pm_runtime.h>
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#include <linux/poll.h>
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#include "amdgpu.h"
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#include "amdgpu_pm.h"
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|
@ -37,85 +36,7 @@
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#include "amdgpu_securedisplay.h"
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#include "amdgpu_fw_attestation.h"
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int amdgpu_debugfs_wait_dump(struct amdgpu_device *adev)
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{
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#if defined(CONFIG_DEBUG_FS)
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unsigned long timeout = 600 * HZ;
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int ret;
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wake_up_interruptible(&adev->autodump.gpu_hang);
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ret = wait_for_completion_interruptible_timeout(&adev->autodump.dumping, timeout);
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if (ret == 0) {
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pr_err("autodump: timeout, move on to gpu recovery\n");
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return -ETIMEDOUT;
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}
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#endif
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return 0;
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}
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#if defined(CONFIG_DEBUG_FS)
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static int amdgpu_debugfs_autodump_open(struct inode *inode, struct file *file)
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{
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struct amdgpu_device *adev = inode->i_private;
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int ret;
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file->private_data = adev;
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ret = down_read_killable(&adev->reset_sem);
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if (ret)
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return ret;
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if (adev->autodump.dumping.done) {
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reinit_completion(&adev->autodump.dumping);
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ret = 0;
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} else {
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ret = -EBUSY;
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}
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up_read(&adev->reset_sem);
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return ret;
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}
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static int amdgpu_debugfs_autodump_release(struct inode *inode, struct file *file)
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{
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struct amdgpu_device *adev = file->private_data;
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complete_all(&adev->autodump.dumping);
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return 0;
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}
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static unsigned int amdgpu_debugfs_autodump_poll(struct file *file, struct poll_table_struct *poll_table)
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{
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struct amdgpu_device *adev = file->private_data;
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poll_wait(file, &adev->autodump.gpu_hang, poll_table);
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if (amdgpu_in_reset(adev))
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return POLLIN | POLLRDNORM | POLLWRNORM;
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return 0;
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}
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static const struct file_operations autodump_debug_fops = {
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.owner = THIS_MODULE,
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.open = amdgpu_debugfs_autodump_open,
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.poll = amdgpu_debugfs_autodump_poll,
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.release = amdgpu_debugfs_autodump_release,
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};
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static void amdgpu_debugfs_autodump_init(struct amdgpu_device *adev)
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{
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||||
init_completion(&adev->autodump.dumping);
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complete_all(&adev->autodump.dumping);
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init_waitqueue_head(&adev->autodump.gpu_hang);
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|
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debugfs_create_file("amdgpu_autodump", 0600,
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adev_to_drm(adev)->primary->debugfs_root,
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adev, &autodump_debug_fops);
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}
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|
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/**
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* amdgpu_debugfs_process_reg_op - Handle MMIO register reads/writes
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|
@ -1588,7 +1509,6 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
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|||
}
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amdgpu_ras_debugfs_create_all(adev);
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amdgpu_debugfs_autodump_init(adev);
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amdgpu_rap_debugfs_init(adev);
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amdgpu_securedisplay_debugfs_init(adev);
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amdgpu_fw_attestation_debugfs_init(adev);
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|
|
|
@ -26,10 +26,6 @@
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/*
|
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* Debugfs
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*/
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struct amdgpu_autodump {
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struct completion dumping;
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struct wait_queue_head gpu_hang;
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};
|
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|
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int amdgpu_debugfs_regs_init(struct amdgpu_device *adev);
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int amdgpu_debugfs_init(struct amdgpu_device *adev);
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|
@ -37,4 +33,3 @@ void amdgpu_debugfs_fini(struct amdgpu_device *adev);
|
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void amdgpu_debugfs_fence_init(struct amdgpu_device *adev);
|
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void amdgpu_debugfs_firmware_init(struct amdgpu_device *adev);
|
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void amdgpu_debugfs_gem_init(struct amdgpu_device *adev);
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int amdgpu_debugfs_wait_dump(struct amdgpu_device *adev);
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|
|
|
@ -2380,10 +2380,6 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
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if (!adev->gmc.xgmi.pending_reset)
|
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amdgpu_amdkfd_device_init(adev);
|
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|
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r = amdgpu_amdkfd_resume_iommu(adev);
|
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if (r)
|
||||
goto init_failed;
|
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|
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amdgpu_fru_get_product_info(adev);
|
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|
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init_failed:
|
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|
@ -4411,10 +4407,6 @@ int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,
|
|||
if (reset_context->reset_req_dev == adev)
|
||||
job = reset_context->job;
|
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|
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/* no need to dump if device is not in good state during probe period */
|
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if (!adev->gmc.xgmi.pending_reset)
|
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amdgpu_debugfs_wait_dump(adev);
|
||||
|
||||
if (amdgpu_sriov_vf(adev)) {
|
||||
/* stop the data exchange thread */
|
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amdgpu_virt_fini_data_exchange(adev);
|
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|
|
|
@ -875,6 +875,9 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd,
|
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|
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svm_migrate_init((struct amdgpu_device *)kfd->kgd);
|
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|
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if(kgd2kfd_resume_iommu(kfd))
|
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goto device_iommu_error;
|
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|
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if (kfd_resume(kfd))
|
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goto kfd_resume_error;
|
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|
||||
|
|
|
@ -247,6 +247,7 @@ static ssize_t dp_link_settings_write(struct file *f, const char __user *buf,
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{
|
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struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
|
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struct dc_link *link = connector->dc_link;
|
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struct dc *dc = (struct dc *)link->dc;
|
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struct dc_link_settings prefer_link_settings;
|
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char *wr_buf = NULL;
|
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const uint32_t wr_buf_size = 40;
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|
@ -313,7 +314,7 @@ static ssize_t dp_link_settings_write(struct file *f, const char __user *buf,
|
|||
prefer_link_settings.lane_count = param[0];
|
||||
prefer_link_settings.link_rate = param[1];
|
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|
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dp_retrain_link_dp_test(link, &prefer_link_settings, false);
|
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dc_link_set_preferred_training_settings(dc, &prefer_link_settings, NULL, link, true);
|
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|
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kfree(wr_buf);
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return size;
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|
|
|
@ -2091,10 +2091,6 @@ static void __execlists_unhold(struct i915_request *rq)
|
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if (p->flags & I915_DEPENDENCY_WEAK)
|
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continue;
|
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|
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/* Propagate any change in error status */
|
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if (rq->fence.error)
|
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i915_request_set_error_once(w, rq->fence.error);
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|
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if (w->engine != rq->engine)
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continue;
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|
|
|
@ -11021,12 +11021,6 @@ enum skl_power_gate {
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#define DC_STATE_DEBUG_MASK_CORES (1 << 0)
|
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#define DC_STATE_DEBUG_MASK_MEMORY_UP (1 << 1)
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#define BXT_P_CR_MC_BIOS_REQ_0_0_0 _MMIO(MCHBAR_MIRROR_BASE_SNB + 0x7114)
|
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#define BXT_REQ_DATA_MASK 0x3F
|
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#define BXT_DRAM_CHANNEL_ACTIVE_SHIFT 12
|
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#define BXT_DRAM_CHANNEL_ACTIVE_MASK (0xF << 12)
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#define BXT_MEMORY_FREQ_MULTIPLIER_HZ 133333333
|
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|
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#define BXT_D_CR_DRP0_DUNIT8 0x1000
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#define BXT_D_CR_DRP0_DUNIT9 0x1200
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#define BXT_D_CR_DRP0_DUNIT_START 8
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|
@ -11057,9 +11051,7 @@ enum skl_power_gate {
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|||
#define BXT_DRAM_TYPE_LPDDR4 (0x2 << 22)
|
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#define BXT_DRAM_TYPE_DDR4 (0x4 << 22)
|
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|
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#define SKL_MEMORY_FREQ_MULTIPLIER_HZ 266666666
|
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#define SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU _MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5E04)
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#define SKL_REQ_DATA_MASK (0xF << 0)
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|
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#define SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN _MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5000)
|
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#define SKL_DRAM_DDR_TYPE_MASK (0x3 << 0)
|
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|
|
|
@ -244,7 +244,6 @@ static int
|
|||
skl_get_dram_info(struct drm_i915_private *i915)
|
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{
|
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struct dram_info *dram_info = &i915->dram_info;
|
||||
u32 mem_freq_khz, val;
|
||||
int ret;
|
||||
|
||||
dram_info->type = skl_get_dram_type(i915);
|
||||
|
@ -255,17 +254,6 @@ skl_get_dram_info(struct drm_i915_private *i915)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
val = intel_uncore_read(&i915->uncore,
|
||||
SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
|
||||
mem_freq_khz = DIV_ROUND_UP((val & SKL_REQ_DATA_MASK) *
|
||||
SKL_MEMORY_FREQ_MULTIPLIER_HZ, 1000);
|
||||
|
||||
if (dram_info->num_channels * mem_freq_khz == 0) {
|
||||
drm_info(&i915->drm,
|
||||
"Couldn't get system memory bandwidth\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -350,24 +338,10 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
|
|||
static int bxt_get_dram_info(struct drm_i915_private *i915)
|
||||
{
|
||||
struct dram_info *dram_info = &i915->dram_info;
|
||||
u32 dram_channels;
|
||||
u32 mem_freq_khz, val;
|
||||
u8 num_active_channels, valid_ranks = 0;
|
||||
u32 val;
|
||||
u8 valid_ranks = 0;
|
||||
int i;
|
||||
|
||||
val = intel_uncore_read(&i915->uncore, BXT_P_CR_MC_BIOS_REQ_0_0_0);
|
||||
mem_freq_khz = DIV_ROUND_UP((val & BXT_REQ_DATA_MASK) *
|
||||
BXT_MEMORY_FREQ_MULTIPLIER_HZ, 1000);
|
||||
|
||||
dram_channels = val & BXT_DRAM_CHANNEL_ACTIVE_MASK;
|
||||
num_active_channels = hweight32(dram_channels);
|
||||
|
||||
if (mem_freq_khz * num_active_channels == 0) {
|
||||
drm_info(&i915->drm,
|
||||
"Couldn't get system memory bandwidth\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Now read each DUNIT8/9/10/11 to check the rank of each dimms.
|
||||
*/
|
||||
|
|
|
@ -1165,7 +1165,11 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
|
|||
read_pos += program_info_length;
|
||||
write_pos += program_info_length;
|
||||
}
|
||||
while (read_pos < length) {
|
||||
while (read_pos + 4 < length) {
|
||||
if (write_pos + 4 >= sizeof(c->operand) - 4) {
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
c->operand[write_pos++] = msg[read_pos++];
|
||||
c->operand[write_pos++] = msg[read_pos++];
|
||||
c->operand[write_pos++] = msg[read_pos++];
|
||||
|
@ -1177,13 +1181,17 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
|
|||
c->operand[write_pos++] = es_info_length >> 8;
|
||||
c->operand[write_pos++] = es_info_length & 0xff;
|
||||
if (es_info_length > 0) {
|
||||
if (read_pos >= length) {
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
pmt_cmd_id = msg[read_pos++];
|
||||
if (pmt_cmd_id != 1 && pmt_cmd_id != 4)
|
||||
dev_err(fdtv->device, "invalid pmt_cmd_id %d at stream level\n",
|
||||
pmt_cmd_id);
|
||||
|
||||
if (es_info_length > sizeof(c->operand) - 4 -
|
||||
write_pos) {
|
||||
if (es_info_length > sizeof(c->operand) - 4 - write_pos ||
|
||||
es_info_length > length - read_pos) {
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
|
|
@ -134,6 +134,8 @@ static int fdtv_ca_pmt(struct firedtv *fdtv, void *arg)
|
|||
} else {
|
||||
data_length = msg->msg[3];
|
||||
}
|
||||
if (data_length > sizeof(msg->msg) - data_pos)
|
||||
return -EINVAL;
|
||||
|
||||
return avc_ca_pmt(fdtv, &msg->msg[data_pos], data_length);
|
||||
}
|
||||
|
|
|
@ -563,20 +563,14 @@ int efx_ethtool_get_link_ksettings(struct net_device *net_dev,
|
|||
{
|
||||
struct efx_nic *efx = netdev_priv(net_dev);
|
||||
struct efx_link_state *link_state = &efx->link_state;
|
||||
u32 supported;
|
||||
|
||||
mutex_lock(&efx->mac_lock);
|
||||
efx_mcdi_phy_get_link_ksettings(efx, cmd);
|
||||
mutex_unlock(&efx->mac_lock);
|
||||
|
||||
/* Both MACs support pause frames (bidirectional and respond-only) */
|
||||
ethtool_convert_link_mode_to_legacy_u32(&supported,
|
||||
cmd->link_modes.supported);
|
||||
|
||||
supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
|
||||
|
||||
ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
|
||||
supported);
|
||||
ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
|
||||
ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
|
||||
|
||||
if (LOOPBACK_INTERNAL(efx)) {
|
||||
cmd->base.speed = link_state->speed;
|
||||
|
|
|
@ -1367,8 +1367,6 @@ static struct sk_buff *vrf_ip6_rcv(struct net_device *vrf_dev,
|
|||
bool need_strict = rt6_need_strict(&ipv6_hdr(skb)->daddr);
|
||||
bool is_ndisc = ipv6_ndisc_frame(skb);
|
||||
|
||||
nf_reset_ct(skb);
|
||||
|
||||
/* loopback, multicast & non-ND link-local traffic; do not push through
|
||||
* packet taps again. Reset pkt_type for upper layers to process skb.
|
||||
* For strict packets with a source LLA, determine the dst using the
|
||||
|
@ -1431,8 +1429,6 @@ static struct sk_buff *vrf_ip_rcv(struct net_device *vrf_dev,
|
|||
skb->skb_iif = vrf_dev->ifindex;
|
||||
IPCB(skb)->flags |= IPSKB_L3SLAVE;
|
||||
|
||||
nf_reset_ct(skb);
|
||||
|
||||
if (ipv4_is_multicast(ip_hdr(skb)->daddr))
|
||||
goto out;
|
||||
|
||||
|
|
|
@ -604,15 +604,6 @@ static int wcn36xx_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
|
|||
}
|
||||
}
|
||||
}
|
||||
/* FIXME: Only enable bmps support when encryption is enabled.
|
||||
* For any reasons, when connected to open/no-security BSS,
|
||||
* the wcn36xx controller in bmps mode does not forward
|
||||
* 'wake-up' beacons despite AP sends DTIM with station AID.
|
||||
* It could be due to a firmware issue or to the way driver
|
||||
* configure the station.
|
||||
*/
|
||||
if (vif->type == NL80211_IFTYPE_STATION)
|
||||
vif_priv->allow_bmps = true;
|
||||
break;
|
||||
case DISABLE_KEY:
|
||||
if (!(IEEE80211_KEY_FLAG_PAIRWISE & key_conf->flags)) {
|
||||
|
@ -913,7 +904,6 @@ static void wcn36xx_bss_info_changed(struct ieee80211_hw *hw,
|
|||
vif->addr,
|
||||
bss_conf->aid);
|
||||
vif_priv->sta_assoc = false;
|
||||
vif_priv->allow_bmps = false;
|
||||
wcn36xx_smd_set_link_st(wcn,
|
||||
bss_conf->bssid,
|
||||
vif->addr,
|
||||
|
|
|
@ -23,10 +23,7 @@ int wcn36xx_pmc_enter_bmps_state(struct wcn36xx *wcn,
|
|||
{
|
||||
int ret = 0;
|
||||
struct wcn36xx_vif *vif_priv = wcn36xx_vif_to_priv(vif);
|
||||
|
||||
if (!vif_priv->allow_bmps)
|
||||
return -ENOTSUPP;
|
||||
|
||||
/* TODO: Make sure the TX chain clean */
|
||||
ret = wcn36xx_smd_enter_bmps(wcn, vif);
|
||||
if (!ret) {
|
||||
wcn36xx_dbg(WCN36XX_DBG_PMC, "Entered BMPS\n");
|
||||
|
|
|
@ -128,7 +128,6 @@ struct wcn36xx_vif {
|
|||
enum wcn36xx_hal_bss_type bss_type;
|
||||
|
||||
/* Power management */
|
||||
bool allow_bmps;
|
||||
enum wcn36xx_power_state pw_state;
|
||||
|
||||
u8 bss_index;
|
||||
|
|
|
@ -553,8 +553,10 @@ EXPORT_SYMBOL(scsi_device_get);
|
|||
*/
|
||||
void scsi_device_put(struct scsi_device *sdev)
|
||||
{
|
||||
module_put(sdev->host->hostt->module);
|
||||
struct module *mod = sdev->host->hostt->module;
|
||||
|
||||
put_device(&sdev->sdev_gendev);
|
||||
module_put(mod);
|
||||
}
|
||||
EXPORT_SYMBOL(scsi_device_put);
|
||||
|
||||
|
|
|
@ -448,9 +448,12 @@ static void scsi_device_dev_release_usercontext(struct work_struct *work)
|
|||
struct scsi_vpd *vpd_pg80 = NULL, *vpd_pg83 = NULL;
|
||||
struct scsi_vpd *vpd_pg0 = NULL, *vpd_pg89 = NULL;
|
||||
unsigned long flags;
|
||||
struct module *mod;
|
||||
|
||||
sdev = container_of(work, struct scsi_device, ew.work);
|
||||
|
||||
mod = sdev->host->hostt->module;
|
||||
|
||||
scsi_dh_release_device(sdev);
|
||||
|
||||
parent = sdev->sdev_gendev.parent;
|
||||
|
@ -501,11 +504,17 @@ static void scsi_device_dev_release_usercontext(struct work_struct *work)
|
|||
|
||||
if (parent)
|
||||
put_device(parent);
|
||||
module_put(mod);
|
||||
}
|
||||
|
||||
static void scsi_device_dev_release(struct device *dev)
|
||||
{
|
||||
struct scsi_device *sdp = to_scsi_device(dev);
|
||||
|
||||
/* Set module pointer as NULL in case of module unloading */
|
||||
if (!try_module_get(sdp->host->hostt->module))
|
||||
sdp->host->hostt->module = NULL;
|
||||
|
||||
execute_in_process_context(scsi_device_dev_release_usercontext,
|
||||
&sdp->ew);
|
||||
}
|
||||
|
|
|
@ -244,6 +244,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
|
|||
goto out_regulator_disable;
|
||||
}
|
||||
|
||||
reset_control_assert(domain->reset);
|
||||
|
||||
if (domain->bits.pxx) {
|
||||
/* request the domain to power up */
|
||||
regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ,
|
||||
|
@ -266,8 +268,6 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
|
|||
GPC_PGC_CTRL_PCR);
|
||||
}
|
||||
|
||||
reset_control_assert(domain->reset);
|
||||
|
||||
/* delay for reset to propagate */
|
||||
udelay(5);
|
||||
|
||||
|
|
|
@ -528,6 +528,10 @@ static const struct usbmix_ctl_map usbmix_ctl_maps[] = {
|
|||
.id = USB_ID(0x2573, 0x0008),
|
||||
.map = maya44_map,
|
||||
},
|
||||
{
|
||||
.id = USB_ID(0x2708, 0x0002), /* Audient iD14 */
|
||||
.ignore_ctl_error = 1,
|
||||
},
|
||||
{
|
||||
/* KEF X300A */
|
||||
.id = USB_ID(0x27ac, 0x1000),
|
||||
|
@ -538,6 +542,10 @@ static const struct usbmix_ctl_map usbmix_ctl_maps[] = {
|
|||
.id = USB_ID(0x25c4, 0x0003),
|
||||
.map = scms_usb3318_map,
|
||||
},
|
||||
{
|
||||
.id = USB_ID(0x30be, 0x0101), /* Schiit Hel */
|
||||
.ignore_ctl_error = 1,
|
||||
},
|
||||
{
|
||||
/* Bose Companion 5 */
|
||||
.id = USB_ID(0x05a7, 0x1020),
|
||||
|
|
Loading…
Reference in New Issue