riscv: switch to ->regset_get()
Note: riscv_fpr_get() used to forget to zero-pad at the end. Not worth -stable... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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c7a0faa21e
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2cb6cd495d
@ -30,13 +30,10 @@ enum riscv_regset {
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static int riscv_gpr_get(struct task_struct *target,
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static int riscv_gpr_get(struct task_struct *target,
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const struct user_regset *regset,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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struct membuf to)
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void *kbuf, void __user *ubuf)
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{
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{
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struct pt_regs *regs;
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return membuf_write(&to, task_pt_regs(target),
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sizeof(struct user_regs_struct));
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regs = task_pt_regs(target);
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf, regs, 0, -1);
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}
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}
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static int riscv_gpr_set(struct task_struct *target,
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static int riscv_gpr_set(struct task_struct *target,
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@ -55,21 +52,13 @@ static int riscv_gpr_set(struct task_struct *target,
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#ifdef CONFIG_FPU
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#ifdef CONFIG_FPU
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static int riscv_fpr_get(struct task_struct *target,
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static int riscv_fpr_get(struct task_struct *target,
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const struct user_regset *regset,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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struct membuf to)
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void *kbuf, void __user *ubuf)
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{
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{
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int ret;
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struct __riscv_d_ext_state *fstate = &target->thread.fstate;
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struct __riscv_d_ext_state *fstate = &target->thread.fstate;
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, fstate, 0,
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membuf_write(&to, fstate, offsetof(struct __riscv_d_ext_state, fcsr));
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offsetof(struct __riscv_d_ext_state, fcsr));
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membuf_store(&to, fstate->fcsr);
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if (!ret) {
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return membuf_zero(&to, 4); // explicitly pad
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, fstate, 0,
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offsetof(struct __riscv_d_ext_state, fcsr) +
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sizeof(fstate->fcsr));
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}
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return ret;
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}
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}
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static int riscv_fpr_set(struct task_struct *target,
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static int riscv_fpr_set(struct task_struct *target,
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@ -98,8 +87,8 @@ static const struct user_regset riscv_user_regset[] = {
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.n = ELF_NGREG,
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.n = ELF_NGREG,
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.size = sizeof(elf_greg_t),
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.size = sizeof(elf_greg_t),
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.align = sizeof(elf_greg_t),
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.align = sizeof(elf_greg_t),
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.get = &riscv_gpr_get,
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.regset_get = riscv_gpr_get,
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.set = &riscv_gpr_set,
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.set = riscv_gpr_set,
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},
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},
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#ifdef CONFIG_FPU
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#ifdef CONFIG_FPU
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[REGSET_F] = {
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[REGSET_F] = {
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@ -107,8 +96,8 @@ static const struct user_regset riscv_user_regset[] = {
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.n = ELF_NFPREG,
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.n = ELF_NFPREG,
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.size = sizeof(elf_fpreg_t),
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.size = sizeof(elf_fpreg_t),
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.align = sizeof(elf_fpreg_t),
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.align = sizeof(elf_fpreg_t),
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.get = &riscv_fpr_get,
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.regset_get = riscv_fpr_get,
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.set = &riscv_fpr_set,
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.set = riscv_fpr_set,
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},
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},
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#endif
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#endif
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};
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};
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