net: mscc: ocelot: Implement port policers via tc command
Hardware offload of matchall classifier and police action are now supported via the tc command. Supported police parameters are: rate and burst. Example: Add: tc qdisc add dev eth3 handle ffff: ingress tc filter add dev eth3 parent ffff: prio 1 handle 2 \ matchall skip_sw \ action police rate 100Mbit burst 10000 Show: tc -s -d qdisc show dev eth3 tc -s -d filter show dev eth3 ingress Delete: tc filter del dev eth3 parent ffff: prio 1 tc qdisc del dev eth3 handle ffff: ingress Signed-off-by: Joergen Andreasen <joergen.andreasen@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
7da33a8f87
commit
2c1d029a01
@ -1,5 +1,5 @@
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# SPDX-License-Identifier: (GPL-2.0 OR MIT)
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obj-$(CONFIG_MSCC_OCELOT_SWITCH) += mscc_ocelot_common.o
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mscc_ocelot_common-y := ocelot.o ocelot_io.o
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mscc_ocelot_common-y += ocelot_regs.o
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mscc_ocelot_common-y += ocelot_regs.o ocelot_tc.o ocelot_police.o
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obj-$(CONFIG_MSCC_OCELOT_SWITCH_OCELOT) += ocelot_board.o
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@ -910,6 +910,13 @@ static int ocelot_set_features(struct net_device *dev,
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struct ocelot_port *port = netdev_priv(dev);
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netdev_features_t changed = dev->features ^ features;
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if ((dev->features & NETIF_F_HW_TC) > (features & NETIF_F_HW_TC) &&
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port->tc.offload_cnt) {
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netdev_err(dev,
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"Cannot disable HW TC offload while offloads active\n");
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return -EBUSY;
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}
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if (changed & NETIF_F_HW_VLAN_CTAG_FILTER)
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ocelot_vlan_mode(port, features);
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@ -943,6 +950,7 @@ static const struct net_device_ops ocelot_port_netdev_ops = {
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.ndo_vlan_rx_kill_vid = ocelot_vlan_rx_kill_vid,
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.ndo_set_features = ocelot_set_features,
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.ndo_get_port_parent_id = ocelot_get_port_parent_id,
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.ndo_setup_tc = ocelot_setup_tc,
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};
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static void ocelot_get_strings(struct net_device *netdev, u32 sset, u8 *data)
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@ -1663,8 +1671,9 @@ int ocelot_probe_port(struct ocelot *ocelot, u8 port,
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dev->netdev_ops = &ocelot_port_netdev_ops;
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dev->ethtool_ops = &ocelot_ethtool_ops;
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dev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_RXFCS;
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dev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
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dev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_RXFCS |
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NETIF_F_HW_TC;
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dev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
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memcpy(dev->dev_addr, ocelot->base_mac, ETH_ALEN);
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dev->dev_addr[ETH_ALEN - 1] += port;
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@ -22,6 +22,7 @@
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#include "ocelot_rew.h"
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#include "ocelot_sys.h"
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#include "ocelot_qs.h"
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#include "ocelot_tc.h"
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#define PGID_AGGR 64
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#define PGID_SRC 80
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@ -458,6 +459,8 @@ struct ocelot_port {
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phy_interface_t phy_mode;
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struct phy *serdes;
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struct ocelot_port_tc tc;
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};
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u32 __ocelot_read_ix(struct ocelot *ocelot, u32 reg, u32 offset);
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227
drivers/net/ethernet/mscc/ocelot_police.c
Normal file
227
drivers/net/ethernet/mscc/ocelot_police.c
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@ -0,0 +1,227 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/* Microsemi Ocelot Switch driver
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*
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* Copyright (c) 2019 Microsemi Corporation
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*/
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#include "ocelot_police.h"
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enum mscc_qos_rate_mode {
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MSCC_QOS_RATE_MODE_DISABLED, /* Policer/shaper disabled */
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MSCC_QOS_RATE_MODE_LINE, /* Measure line rate in kbps incl. IPG */
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MSCC_QOS_RATE_MODE_DATA, /* Measures data rate in kbps excl. IPG */
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MSCC_QOS_RATE_MODE_FRAME, /* Measures frame rate in fps */
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__MSCC_QOS_RATE_MODE_END,
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NUM_MSCC_QOS_RATE_MODE = __MSCC_QOS_RATE_MODE_END,
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MSCC_QOS_RATE_MODE_MAX = __MSCC_QOS_RATE_MODE_END - 1,
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};
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/* Types for ANA:POL[0-192]:POL_MODE_CFG.FRM_MODE */
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#define POL_MODE_LINERATE 0 /* Incl IPG. Unit: 33 1/3 kbps, 4096 bytes */
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#define POL_MODE_DATARATE 1 /* Excl IPG. Unit: 33 1/3 kbps, 4096 bytes */
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#define POL_MODE_FRMRATE_HI 2 /* Unit: 33 1/3 fps, 32.8 frames */
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#define POL_MODE_FRMRATE_LO 3 /* Unit: 1/3 fps, 0.3 frames */
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/* Policer indexes */
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#define POL_IX_PORT 0 /* 0-11 : Port policers */
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#define POL_IX_QUEUE 32 /* 32-127 : Queue policers */
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/* Default policer order */
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#define POL_ORDER 0x1d3 /* Ocelot policer order: Serial (QoS -> Port -> VCAP) */
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struct qos_policer_conf {
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enum mscc_qos_rate_mode mode;
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bool dlb; /* Enable DLB (dual leaky bucket mode */
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bool cf; /* Coupling flag (ignored in SLB mode) */
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u32 cir; /* CIR in kbps/fps (ignored in SLB mode) */
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u32 cbs; /* CBS in bytes/frames (ignored in SLB mode) */
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u32 pir; /* PIR in kbps/fps */
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u32 pbs; /* PBS in bytes/frames */
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u8 ipg; /* Size of IPG when MSCC_QOS_RATE_MODE_LINE is chosen */
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};
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static int qos_policer_conf_set(struct ocelot_port *port, u32 pol_ix,
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struct qos_policer_conf *conf)
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{
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u32 cf = 0, cir_ena = 0, frm_mode = POL_MODE_LINERATE;
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u32 cir = 0, cbs = 0, pir = 0, pbs = 0;
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bool cir_discard = 0, pir_discard = 0;
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struct ocelot *ocelot = port->ocelot;
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u32 pbs_max = 0, cbs_max = 0;
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u8 ipg = 20;
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u32 value;
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pir = conf->pir;
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pbs = conf->pbs;
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switch (conf->mode) {
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case MSCC_QOS_RATE_MODE_LINE:
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case MSCC_QOS_RATE_MODE_DATA:
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if (conf->mode == MSCC_QOS_RATE_MODE_LINE) {
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frm_mode = POL_MODE_LINERATE;
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ipg = min_t(u8, GENMASK(4, 0), conf->ipg);
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} else {
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frm_mode = POL_MODE_DATARATE;
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}
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if (conf->dlb) {
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cir_ena = 1;
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cir = conf->cir;
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cbs = conf->cbs;
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if (cir == 0 && cbs == 0) {
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/* Discard cir frames */
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cir_discard = 1;
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} else {
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cir = DIV_ROUND_UP(cir, 100);
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cir *= 3; /* 33 1/3 kbps */
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cbs = DIV_ROUND_UP(cbs, 4096);
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cbs = (cbs ? cbs : 1); /* No zero burst size */
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cbs_max = 60; /* Limit burst size */
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cf = conf->cf;
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if (cf)
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pir += conf->cir;
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}
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}
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if (pir == 0 && pbs == 0) {
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/* Discard PIR frames */
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pir_discard = 1;
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} else {
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pir = DIV_ROUND_UP(pir, 100);
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pir *= 3; /* 33 1/3 kbps */
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pbs = DIV_ROUND_UP(pbs, 4096);
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pbs = (pbs ? pbs : 1); /* No zero burst size */
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pbs_max = 60; /* Limit burst size */
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}
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break;
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case MSCC_QOS_RATE_MODE_FRAME:
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if (pir >= 100) {
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frm_mode = POL_MODE_FRMRATE_HI;
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pir = DIV_ROUND_UP(pir, 100);
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pir *= 3; /* 33 1/3 fps */
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pbs = (pbs * 10) / 328; /* 32.8 frames */
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pbs = (pbs ? pbs : 1); /* No zero burst size */
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pbs_max = GENMASK(6, 0); /* Limit burst size */
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} else {
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frm_mode = POL_MODE_FRMRATE_LO;
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if (pir == 0 && pbs == 0) {
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/* Discard all frames */
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pir_discard = 1;
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cir_discard = 1;
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} else {
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pir *= 3; /* 1/3 fps */
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pbs = (pbs * 10) / 3; /* 0.3 frames */
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pbs = (pbs ? pbs : 1); /* No zero burst size */
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pbs_max = 61; /* Limit burst size */
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}
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}
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break;
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default: /* MSCC_QOS_RATE_MODE_DISABLED */
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/* Disable policer using maximum rate and zero burst */
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pir = GENMASK(15, 0);
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pbs = 0;
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break;
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}
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/* Check limits */
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if (pir > GENMASK(15, 0)) {
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netdev_err(port->dev, "Invalid pir\n");
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return -EINVAL;
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}
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if (cir > GENMASK(15, 0)) {
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netdev_err(port->dev, "Invalid cir\n");
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return -EINVAL;
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}
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if (pbs > pbs_max) {
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netdev_err(port->dev, "Invalid pbs\n");
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return -EINVAL;
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}
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if (cbs > cbs_max) {
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netdev_err(port->dev, "Invalid cbs\n");
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return -EINVAL;
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}
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value = (ANA_POL_MODE_CFG_IPG_SIZE(ipg) |
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ANA_POL_MODE_CFG_FRM_MODE(frm_mode) |
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(cf ? ANA_POL_MODE_CFG_DLB_COUPLED : 0) |
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(cir_ena ? ANA_POL_MODE_CFG_CIR_ENA : 0) |
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ANA_POL_MODE_CFG_OVERSHOOT_ENA);
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ocelot_write_gix(ocelot, value, ANA_POL_MODE_CFG, pol_ix);
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ocelot_write_gix(ocelot,
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ANA_POL_PIR_CFG_PIR_RATE(pir) |
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ANA_POL_PIR_CFG_PIR_BURST(pbs),
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ANA_POL_PIR_CFG, pol_ix);
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ocelot_write_gix(ocelot,
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(pir_discard ? GENMASK(22, 0) : 0),
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ANA_POL_PIR_STATE, pol_ix);
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ocelot_write_gix(ocelot,
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ANA_POL_CIR_CFG_CIR_RATE(cir) |
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ANA_POL_CIR_CFG_CIR_BURST(cbs),
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ANA_POL_CIR_CFG, pol_ix);
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ocelot_write_gix(ocelot,
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(cir_discard ? GENMASK(22, 0) : 0),
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ANA_POL_CIR_STATE, pol_ix);
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return 0;
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}
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int ocelot_port_policer_add(struct ocelot_port *port,
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struct ocelot_policer *pol)
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{
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struct ocelot *ocelot = port->ocelot;
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struct qos_policer_conf pp = { 0 };
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int err;
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if (!pol)
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return -EINVAL;
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pp.mode = MSCC_QOS_RATE_MODE_DATA;
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pp.pir = pol->rate;
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pp.pbs = pol->burst;
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netdev_dbg(port->dev,
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"%s: port %u pir %u kbps, pbs %u bytes\n",
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__func__, port->chip_port, pp.pir, pp.pbs);
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err = qos_policer_conf_set(port, POL_IX_PORT + port->chip_port, &pp);
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if (err)
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return err;
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ocelot_rmw_gix(ocelot,
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ANA_PORT_POL_CFG_PORT_POL_ENA |
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ANA_PORT_POL_CFG_POL_ORDER(POL_ORDER),
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ANA_PORT_POL_CFG_PORT_POL_ENA |
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ANA_PORT_POL_CFG_POL_ORDER_M,
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ANA_PORT_POL_CFG, port->chip_port);
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return 0;
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}
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int ocelot_port_policer_del(struct ocelot_port *port)
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{
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struct ocelot *ocelot = port->ocelot;
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struct qos_policer_conf pp = { 0 };
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int err;
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netdev_dbg(port->dev, "%s: port %u\n", __func__, port->chip_port);
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pp.mode = MSCC_QOS_RATE_MODE_DISABLED;
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err = qos_policer_conf_set(port, POL_IX_PORT + port->chip_port, &pp);
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if (err)
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return err;
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ocelot_rmw_gix(ocelot,
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ANA_PORT_POL_CFG_POL_ORDER(POL_ORDER),
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ANA_PORT_POL_CFG_PORT_POL_ENA |
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ANA_PORT_POL_CFG_POL_ORDER_M,
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ANA_PORT_POL_CFG, port->chip_port);
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return 0;
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}
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22
drivers/net/ethernet/mscc/ocelot_police.h
Normal file
22
drivers/net/ethernet/mscc/ocelot_police.h
Normal file
@ -0,0 +1,22 @@
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/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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/* Microsemi Ocelot Switch driver
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*
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* Copyright (c) 2019 Microsemi Corporation
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*/
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#ifndef _MSCC_OCELOT_POLICE_H_
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#define _MSCC_OCELOT_POLICE_H_
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#include "ocelot.h"
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struct ocelot_policer {
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u32 rate; /* kilobit per second */
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u32 burst; /* bytes */
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};
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int ocelot_port_policer_add(struct ocelot_port *port,
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struct ocelot_policer *pol);
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int ocelot_port_policer_del(struct ocelot_port *port);
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#endif /* _MSCC_OCELOT_POLICE_H_ */
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174
drivers/net/ethernet/mscc/ocelot_tc.c
Normal file
174
drivers/net/ethernet/mscc/ocelot_tc.c
Normal file
@ -0,0 +1,174 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/* Microsemi Ocelot Switch TC driver
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*
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* Copyright (c) 2019 Microsemi Corporation
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*/
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#include "ocelot_tc.h"
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#include "ocelot_police.h"
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#include <net/pkt_cls.h>
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static int ocelot_setup_tc_cls_matchall(struct ocelot_port *port,
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struct tc_cls_matchall_offload *f,
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bool ingress)
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{
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struct netlink_ext_ack *extack = f->common.extack;
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struct ocelot_policer pol = { 0 };
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struct flow_action_entry *action;
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int err;
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netdev_dbg(port->dev, "%s: port %u command %d cookie %lu\n",
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__func__, port->chip_port, f->command, f->cookie);
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if (!ingress) {
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NL_SET_ERR_MSG_MOD(extack, "Only ingress is supported");
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return -EOPNOTSUPP;
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}
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switch (f->command) {
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case TC_CLSMATCHALL_REPLACE:
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if (!flow_offload_has_one_action(&f->rule->action)) {
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NL_SET_ERR_MSG_MOD(extack,
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"Only one action is supported");
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return -EOPNOTSUPP;
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}
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if (port->tc.block_shared) {
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NL_SET_ERR_MSG_MOD(extack,
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"Rate limit is not supported on shared blocks");
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return -EOPNOTSUPP;
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}
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action = &f->rule->action.entries[0];
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if (action->id != FLOW_ACTION_POLICE) {
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NL_SET_ERR_MSG_MOD(extack, "Unsupported action");
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return -EOPNOTSUPP;
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}
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if (port->tc.police_id && port->tc.police_id != f->cookie) {
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NL_SET_ERR_MSG_MOD(extack,
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"Only one policer per port is supported\n");
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return -EEXIST;
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}
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pol.rate = (u32)div_u64(action->police.rate_bytes_ps, 1000) * 8;
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pol.burst = (u32)div_u64(action->police.rate_bytes_ps *
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PSCHED_NS2TICKS(action->police.burst),
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PSCHED_TICKS_PER_SEC);
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err = ocelot_port_policer_add(port, &pol);
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if (err) {
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NL_SET_ERR_MSG_MOD(extack, "Could not add policer\n");
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return err;
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}
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port->tc.police_id = f->cookie;
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port->tc.offload_cnt++;
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return 0;
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case TC_CLSMATCHALL_DESTROY:
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if (port->tc.police_id != f->cookie)
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return -ENOENT;
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err = ocelot_port_policer_del(port);
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if (err) {
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NL_SET_ERR_MSG_MOD(extack,
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"Could not delete policer\n");
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return err;
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}
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port->tc.police_id = 0;
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port->tc.offload_cnt--;
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return 0;
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case TC_CLSMATCHALL_STATS: /* fall through */
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default:
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return -EOPNOTSUPP;
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}
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}
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static int ocelot_setup_tc_block_cb(enum tc_setup_type type,
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void *type_data,
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void *cb_priv, bool ingress)
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{
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struct ocelot_port *port = cb_priv;
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if (!tc_cls_can_offload_and_chain0(port->dev, type_data))
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return -EOPNOTSUPP;
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switch (type) {
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case TC_SETUP_CLSMATCHALL:
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netdev_dbg(port->dev, "tc_block_cb: TC_SETUP_CLSMATCHALL %s\n",
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ingress ? "ingress" : "egress");
|
||||
|
||||
return ocelot_setup_tc_cls_matchall(port, type_data, ingress);
|
||||
case TC_SETUP_CLSFLOWER:
|
||||
netdev_dbg(port->dev, "tc_block_cb: TC_SETUP_CLSFLOWER %s\n",
|
||||
ingress ? "ingress" : "egress");
|
||||
|
||||
return -EOPNOTSUPP;
|
||||
default:
|
||||
netdev_dbg(port->dev, "tc_block_cb: type %d %s\n",
|
||||
type,
|
||||
ingress ? "ingress" : "egress");
|
||||
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
static int ocelot_setup_tc_block_cb_ig(enum tc_setup_type type,
|
||||
void *type_data,
|
||||
void *cb_priv)
|
||||
{
|
||||
return ocelot_setup_tc_block_cb(type, type_data,
|
||||
cb_priv, true);
|
||||
}
|
||||
|
||||
static int ocelot_setup_tc_block_cb_eg(enum tc_setup_type type,
|
||||
void *type_data,
|
||||
void *cb_priv)
|
||||
{
|
||||
return ocelot_setup_tc_block_cb(type, type_data,
|
||||
cb_priv, false);
|
||||
}
|
||||
|
||||
static int ocelot_setup_tc_block(struct ocelot_port *port,
|
||||
struct tc_block_offload *f)
|
||||
{
|
||||
tc_setup_cb_t *cb;
|
||||
|
||||
netdev_dbg(port->dev, "tc_block command %d, binder_type %d\n",
|
||||
f->command, f->binder_type);
|
||||
|
||||
if (f->binder_type == TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS) {
|
||||
cb = ocelot_setup_tc_block_cb_ig;
|
||||
port->tc.block_shared = tcf_block_shared(f->block);
|
||||
} else if (f->binder_type == TCF_BLOCK_BINDER_TYPE_CLSACT_EGRESS) {
|
||||
cb = ocelot_setup_tc_block_cb_eg;
|
||||
} else {
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
switch (f->command) {
|
||||
case TC_BLOCK_BIND:
|
||||
return tcf_block_cb_register(f->block, cb, port,
|
||||
port, f->extack);
|
||||
case TC_BLOCK_UNBIND:
|
||||
tcf_block_cb_unregister(f->block, cb, port);
|
||||
return 0;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
}
|
||||
|
||||
int ocelot_setup_tc(struct net_device *dev, enum tc_setup_type type,
|
||||
void *type_data)
|
||||
{
|
||||
struct ocelot_port *port = netdev_priv(dev);
|
||||
|
||||
switch (type) {
|
||||
case TC_SETUP_BLOCK:
|
||||
return ocelot_setup_tc_block(port, type_data);
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
return 0;
|
||||
}
|
22
drivers/net/ethernet/mscc/ocelot_tc.h
Normal file
22
drivers/net/ethernet/mscc/ocelot_tc.h
Normal file
@ -0,0 +1,22 @@
|
||||
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
|
||||
/* Microsemi Ocelot Switch driver
|
||||
*
|
||||
* Copyright (c) 2019 Microsemi Corporation
|
||||
*/
|
||||
|
||||
#ifndef _MSCC_OCELOT_TC_H_
|
||||
#define _MSCC_OCELOT_TC_H_
|
||||
|
||||
#include <linux/netdevice.h>
|
||||
|
||||
struct ocelot_port_tc {
|
||||
bool block_shared;
|
||||
unsigned long offload_cnt;
|
||||
|
||||
unsigned long police_id;
|
||||
};
|
||||
|
||||
int ocelot_setup_tc(struct net_device *dev, enum tc_setup_type type,
|
||||
void *type_data);
|
||||
|
||||
#endif /* _MSCC_OCELOT_TC_H_ */
|
Loading…
Reference in New Issue
Block a user