MIPS: Loongson-3: Fix fp register access if MSA enabled
If MSA is enabled, FPU_REG_WIDTH is 128 rather than 64, then get_fpr64()
/set_fpr64() in the original unaligned instruction emulation code access
the wrong fp registers. This is because the current code doesn't specify
the correct index field, so fix it.
Fixes: f83e4f9896
("MIPS: Loongson-3: Add some unaligned instructions emulation")
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
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b959b97860
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@ -95,10 +95,8 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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if (res)
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if (res)
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goto fault;
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goto fault;
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set_fpr64(current->thread.fpu.fpr,
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set_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0, value);
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insn.loongson3_lswc2_format.rt, value);
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set_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0, value_next);
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set_fpr64(current->thread.fpu.fpr,
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insn.loongson3_lswc2_format.rq, value_next);
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compute_return_epc(regs);
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compute_return_epc(regs);
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own_fpu(1);
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own_fpu(1);
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}
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}
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@ -130,15 +128,13 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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goto sigbus;
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goto sigbus;
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lose_fpu(1);
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lose_fpu(1);
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value_next = get_fpr64(current->thread.fpu.fpr,
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value_next = get_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lswc2_format.rq], 0);
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insn.loongson3_lswc2_format.rq);
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StoreDW(addr + 8, value_next, res);
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StoreDW(addr + 8, value_next, res);
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if (res)
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if (res)
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goto fault;
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goto fault;
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value = get_fpr64(current->thread.fpu.fpr,
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value = get_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lswc2_format.rt], 0);
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insn.loongson3_lswc2_format.rt);
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StoreDW(addr, value, res);
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StoreDW(addr, value, res);
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if (res)
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if (res)
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@ -204,8 +200,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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if (res)
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if (res)
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goto fault;
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goto fault;
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set_fpr64(current->thread.fpu.fpr,
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set_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value);
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insn.loongson3_lsdc2_format.rt, value);
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compute_return_epc(regs);
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compute_return_epc(regs);
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own_fpu(1);
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own_fpu(1);
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@ -221,8 +216,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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if (res)
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if (res)
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goto fault;
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goto fault;
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set_fpr64(current->thread.fpu.fpr,
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set_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0, value);
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insn.loongson3_lsdc2_format.rt, value);
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compute_return_epc(regs);
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compute_return_epc(regs);
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own_fpu(1);
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own_fpu(1);
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break;
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break;
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@ -286,8 +280,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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goto sigbus;
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goto sigbus;
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lose_fpu(1);
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lose_fpu(1);
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value = get_fpr64(current->thread.fpu.fpr,
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value = get_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0);
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insn.loongson3_lsdc2_format.rt);
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StoreW(addr, value, res);
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StoreW(addr, value, res);
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if (res)
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if (res)
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@ -305,8 +298,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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goto sigbus;
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goto sigbus;
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lose_fpu(1);
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lose_fpu(1);
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value = get_fpr64(current->thread.fpu.fpr,
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value = get_fpr64(¤t->thread.fpu.fpr[insn.loongson3_lsdc2_format.rt], 0);
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insn.loongson3_lsdc2_format.rt);
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StoreDW(addr, value, res);
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StoreDW(addr, value, res);
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if (res)
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if (res)
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