2005-04-16 22:20:36 +00:00
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/*
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* Generic Generic NCR5380 driver defines
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*
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* Copyright 1993, Drew Eckhardt
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* Visionary Computing
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* (Unix and Linux consulting and custom programming)
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* drew@colorado.edu
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* +1 (303) 440-4894
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*
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* NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
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* K.Lentin@cs.monash.edu.au
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*
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* ALPHA RELEASE 1.
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*
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* For more information, please consult
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*
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* NCR 5380 Family
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* SCSI Protocol Controller
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* Databook
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*
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* NCR Microelectronics
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* 1635 Aeroplaza Drive
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* Colorado Springs, CO 80916
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* 1+ (719) 578-3400
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* 1+ (800) 334-5454
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*/
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/*
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* $Log: generic_NCR5380.h,v $
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*/
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#ifndef GENERIC_NCR5380_H
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#define GENERIC_NCR5380_H
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#include <linux/config.h>
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#define GENERIC_NCR5380_PUBLIC_RELEASE 1
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#ifdef NCR53C400
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#define BIOSPARAM
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#define NCR5380_BIOSPARAM generic_NCR5380_biosparam
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#else
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#define NCR5380_BIOSPARAM NULL
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#endif
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#ifndef ASM
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static int generic_NCR5380_abort(Scsi_Cmnd *);
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2005-10-31 17:31:40 +00:00
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static int generic_NCR5380_detect(struct scsi_host_template *);
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2005-04-16 22:20:36 +00:00
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static int generic_NCR5380_release_resources(struct Scsi_Host *);
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static int generic_NCR5380_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
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static int generic_NCR5380_bus_reset(Scsi_Cmnd *);
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static const char* generic_NCR5380_info(struct Scsi_Host *);
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#ifndef CMD_PER_LUN
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#define CMD_PER_LUN 2
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#endif
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#ifndef CAN_QUEUE
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#define CAN_QUEUE 16
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#endif
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#ifndef HOSTS_C
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#define __STRVAL(x) #x
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#define STRVAL(x) __STRVAL(x)
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#ifndef CONFIG_SCSI_G_NCR5380_MEM
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#define NCR5380_map_config port
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#define NCR5380_map_type int
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#define NCR5380_map_name port
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#define NCR5380_instance_name io_port
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#define NCR53C400_register_offset 0
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#define NCR53C400_address_adjust 8
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#ifdef NCR53C400
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#define NCR5380_region_size 16
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#else
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#define NCR5380_region_size 8
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#endif
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#define NCR5380_read(reg) (inb(NCR5380_map_name + (reg)))
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#define NCR5380_write(reg, value) (outb((value), (NCR5380_map_name + (reg))))
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#else
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/* therefore CONFIG_SCSI_G_NCR5380_MEM */
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#define NCR5380_map_config memory
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#define NCR5380_map_type unsigned long
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#define NCR5380_map_name base
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#define NCR5380_instance_name base
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#define NCR53C400_register_offset 0x108
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#define NCR53C400_address_adjust 0
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#define NCR53C400_mem_base 0x3880
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#define NCR53C400_host_buffer 0x3900
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#define NCR5380_region_size 0x3a00
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#define NCR5380_read(reg) isa_readb(NCR5380_map_name + NCR53C400_mem_base + (reg))
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#define NCR5380_write(reg, value) isa_writeb(value, NCR5380_map_name + NCR53C400_mem_base + (reg))
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#endif
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#define NCR5380_implementation_fields \
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NCR5380_map_type NCR5380_map_name
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#define NCR5380_local_declare() \
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register NCR5380_implementation_fields
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#define NCR5380_setup(instance) \
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NCR5380_map_name = (NCR5380_map_type)((instance)->NCR5380_instance_name)
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#define NCR5380_intr generic_NCR5380_intr
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#define NCR5380_queue_command generic_NCR5380_queue_command
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#define NCR5380_abort generic_NCR5380_abort
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#define NCR5380_bus_reset generic_NCR5380_bus_reset
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#define NCR5380_pread generic_NCR5380_pread
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#define NCR5380_pwrite generic_NCR5380_pwrite
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#define NCR5380_proc_info notyet_generic_proc_info
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#define BOARD_NCR5380 0
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#define BOARD_NCR53C400 1
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#define BOARD_NCR53C400A 2
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#define BOARD_DTC3181E 3
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#endif /* else def HOSTS_C */
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#endif /* ndef ASM */
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#endif /* GENERIC_NCR5380_H */
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