2005-08-08 03:24:38 +00:00
|
|
|
#ifndef _PPC64_PPC_ASM_H
|
|
|
|
#define _PPC64_PPC_ASM_H
|
|
|
|
/*
|
|
|
|
*
|
|
|
|
* Definitions used by various bits of low-level assembly code on PowerPC.
|
|
|
|
*
|
|
|
|
* Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan.
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU General Public License
|
|
|
|
* as published by the Free Software Foundation; either version
|
|
|
|
* 2 of the License, or (at your option) any later version.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* Condition Register Bit Fields */
|
|
|
|
|
|
|
|
#define cr0 0
|
|
|
|
#define cr1 1
|
|
|
|
#define cr2 2
|
|
|
|
#define cr3 3
|
|
|
|
#define cr4 4
|
|
|
|
#define cr5 5
|
|
|
|
#define cr6 6
|
|
|
|
#define cr7 7
|
|
|
|
|
|
|
|
|
|
|
|
/* General Purpose Registers (GPRs) */
|
|
|
|
|
|
|
|
#define r0 0
|
|
|
|
#define r1 1
|
|
|
|
#define r2 2
|
|
|
|
#define r3 3
|
|
|
|
#define r4 4
|
|
|
|
#define r5 5
|
|
|
|
#define r6 6
|
|
|
|
#define r7 7
|
|
|
|
#define r8 8
|
|
|
|
#define r9 9
|
|
|
|
#define r10 10
|
|
|
|
#define r11 11
|
|
|
|
#define r12 12
|
|
|
|
#define r13 13
|
|
|
|
#define r14 14
|
|
|
|
#define r15 15
|
|
|
|
#define r16 16
|
|
|
|
#define r17 17
|
|
|
|
#define r18 18
|
|
|
|
#define r19 19
|
|
|
|
#define r20 20
|
|
|
|
#define r21 21
|
|
|
|
#define r22 22
|
|
|
|
#define r23 23
|
|
|
|
#define r24 24
|
|
|
|
#define r25 25
|
|
|
|
#define r26 26
|
|
|
|
#define r27 27
|
|
|
|
#define r28 28
|
|
|
|
#define r29 29
|
|
|
|
#define r30 30
|
|
|
|
#define r31 31
|
|
|
|
|
2013-08-21 00:33:12 +00:00
|
|
|
#define SPRN_TBRL 268
|
|
|
|
#define SPRN_TBRU 269
|
|
|
|
|
2005-08-08 03:24:38 +00:00
|
|
|
#endif /* _PPC64_PPC_ASM_H */
|