2017-08-02 16:09:19 +00:00
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#define pr_fmt(fmt) "Hyper-V: " fmt
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#include <linux/hyperv.h>
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#include <linux/log2.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <asm/fpu/api.h>
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#include <asm/mshyperv.h>
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#include <asm/msr.h>
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#include <asm/tlbflush.h>
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2018-08-22 15:30:16 +00:00
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#include <asm/tlb.h>
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2017-08-02 16:09:19 +00:00
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2017-08-02 16:09:21 +00:00
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#define CREATE_TRACE_POINTS
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#include <asm/trace/hyperv.h>
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2017-08-02 16:09:19 +00:00
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/* Each gva in gva_list encodes up to 4096 pages to flush */
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#define HV_TLB_FLUSH_UNIT (4096 * PAGE_SIZE)
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2018-06-21 13:32:38 +00:00
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static u64 hyperv_flush_tlb_others_ex(const struct cpumask *cpus,
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const struct flush_tlb_info *info);
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2017-08-02 16:09:20 +00:00
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2017-08-02 16:09:19 +00:00
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/*
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* Fills in gva_list starting from offset. Returns the number of items added.
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*/
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static inline int fill_gva_list(u64 gva_list[], int offset,
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unsigned long start, unsigned long end)
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{
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int gva_n = offset;
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unsigned long cur = start, diff;
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do {
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diff = end > cur ? end - cur : 0;
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gva_list[gva_n] = cur & PAGE_MASK;
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/*
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* Lower 12 bits encode the number of additional
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* pages to flush (in addition to the 'cur' page).
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*/
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2019-09-02 12:41:43 +00:00
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if (diff >= HV_TLB_FLUSH_UNIT) {
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2017-08-02 16:09:19 +00:00
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gva_list[gva_n] |= ~PAGE_MASK;
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2019-09-02 12:41:43 +00:00
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cur += HV_TLB_FLUSH_UNIT;
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} else if (diff) {
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2017-08-02 16:09:19 +00:00
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gva_list[gva_n] |= (diff - 1) >> PAGE_SHIFT;
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2019-09-02 12:41:43 +00:00
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cur = end;
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}
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2017-08-02 16:09:19 +00:00
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gva_n++;
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} while (cur < end);
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return gva_n - offset;
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}
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2021-02-20 23:17:07 +00:00
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static void hyperv_flush_tlb_multi(const struct cpumask *cpus,
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const struct flush_tlb_info *info)
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2017-08-02 16:09:19 +00:00
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{
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int cpu, vcpu, gva_n, max_gvas;
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2018-05-16 15:21:24 +00:00
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struct hv_tlb_flush **flush_pcpu;
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struct hv_tlb_flush *flush;
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2021-04-17 00:43:03 +00:00
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u64 status;
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2017-08-02 16:09:19 +00:00
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unsigned long flags;
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2021-02-20 23:17:07 +00:00
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trace_hyperv_mmu_flush_tlb_multi(cpus, info);
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2017-08-02 16:09:21 +00:00
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2018-05-16 21:53:34 +00:00
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if (!hv_hypercall_pg)
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2017-08-02 16:09:19 +00:00
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goto do_native;
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local_irq_save(flags);
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2021-01-05 17:50:43 +00:00
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/*
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* Only check the mask _after_ interrupt has been disabled to avoid the
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* mask changing under our feet.
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*/
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if (cpumask_empty(cpus)) {
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local_irq_restore(flags);
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return;
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}
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2018-05-16 15:21:24 +00:00
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flush_pcpu = (struct hv_tlb_flush **)
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2018-05-16 21:53:34 +00:00
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this_cpu_ptr(hyperv_pcpu_input_arg);
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2017-10-05 11:39:24 +00:00
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flush = *flush_pcpu;
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if (unlikely(!flush)) {
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local_irq_restore(flags);
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goto do_native;
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}
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2017-08-02 16:09:19 +00:00
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if (info->mm) {
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2018-01-24 10:36:29 +00:00
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/*
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* AddressSpace argument must match the CR3 with PCID bits
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* stripped out.
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*/
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2017-08-02 16:09:19 +00:00
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flush->address_space = virt_to_phys(info->mm->pgd);
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2018-01-24 10:36:29 +00:00
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flush->address_space &= CR3_ADDR_MASK;
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2017-08-02 16:09:19 +00:00
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flush->flags = 0;
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} else {
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flush->address_space = 0;
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flush->flags = HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES;
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}
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flush->processor_mask = 0;
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if (cpumask_equal(cpus, cpu_present_mask)) {
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flush->flags |= HV_FLUSH_ALL_PROCESSORS;
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} else {
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2018-06-21 13:32:38 +00:00
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/*
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* From the supplied CPU set we need to figure out if we can get
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* away with cheaper HVCALL_FLUSH_VIRTUAL_ADDRESS_{LIST,SPACE}
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* hypercalls. This is possible when the highest VP number in
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* the set is < 64. As VP numbers are usually in ascending order
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* and match Linux CPU ids, here is an optimization: we check
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* the VP number for the highest bit in the supplied set first
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* so we can quickly find out if using *_EX hypercalls is a
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* must. We will also check all VP numbers when walking the
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* supplied CPU set to remain correct in all cases.
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*/
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if (hv_cpu_number_to_vp_number(cpumask_last(cpus)) >= 64)
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goto do_ex_hypercall;
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2017-08-02 16:09:19 +00:00
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for_each_cpu(cpu, cpus) {
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vcpu = hv_cpu_number_to_vp_number(cpu);
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2018-07-09 17:40:12 +00:00
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if (vcpu == VP_INVAL) {
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local_irq_restore(flags);
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goto do_native;
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}
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2017-08-02 16:09:19 +00:00
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if (vcpu >= 64)
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2018-06-21 13:32:38 +00:00
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goto do_ex_hypercall;
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2017-08-02 16:09:19 +00:00
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__set_bit(vcpu, (unsigned long *)
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&flush->processor_mask);
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}
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}
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/*
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* We can flush not more than max_gvas with one hypercall. Flush the
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* whole address space if we were asked to do more.
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*/
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max_gvas = (PAGE_SIZE - sizeof(*flush)) / sizeof(flush->gva_list[0]);
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if (info->end == TLB_FLUSH_ALL) {
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flush->flags |= HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY;
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status = hv_do_hypercall(HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE,
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flush, NULL);
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} else if (info->end &&
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((info->end - info->start)/HV_TLB_FLUSH_UNIT) > max_gvas) {
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status = hv_do_hypercall(HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE,
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flush, NULL);
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} else {
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gva_n = fill_gva_list(flush->gva_list, 0,
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info->start, info->end);
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status = hv_do_rep_hypercall(HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST,
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gva_n, 0, flush, NULL);
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}
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2018-06-21 13:32:38 +00:00
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goto check_status;
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do_ex_hypercall:
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status = hyperv_flush_tlb_others_ex(cpus, info);
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2017-08-02 16:09:19 +00:00
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2018-06-21 13:32:38 +00:00
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check_status:
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2017-08-02 16:09:19 +00:00
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local_irq_restore(flags);
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2021-04-17 00:43:03 +00:00
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if (hv_result_success(status))
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2017-08-02 16:09:19 +00:00
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return;
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do_native:
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2021-02-20 23:17:07 +00:00
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native_flush_tlb_multi(cpus, info);
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2017-08-02 16:09:19 +00:00
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}
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2018-06-21 13:32:38 +00:00
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static u64 hyperv_flush_tlb_others_ex(const struct cpumask *cpus,
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const struct flush_tlb_info *info)
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2017-08-02 16:09:20 +00:00
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{
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int nr_bank = 0, max_gvas, gva_n;
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2018-05-16 15:21:24 +00:00
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struct hv_tlb_flush_ex **flush_pcpu;
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struct hv_tlb_flush_ex *flush;
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2018-06-21 13:32:38 +00:00
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u64 status;
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2017-08-02 16:09:21 +00:00
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2018-06-21 13:32:38 +00:00
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if (!(ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED))
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2021-04-17 00:43:03 +00:00
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return HV_STATUS_INVALID_PARAMETER;
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2017-08-02 16:09:20 +00:00
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2018-05-16 15:21:24 +00:00
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flush_pcpu = (struct hv_tlb_flush_ex **)
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2018-05-16 21:53:34 +00:00
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this_cpu_ptr(hyperv_pcpu_input_arg);
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2017-10-05 11:39:24 +00:00
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flush = *flush_pcpu;
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2017-08-02 16:09:20 +00:00
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if (info->mm) {
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2018-01-24 10:36:29 +00:00
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/*
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* AddressSpace argument must match the CR3 with PCID bits
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* stripped out.
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*/
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2017-08-02 16:09:20 +00:00
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flush->address_space = virt_to_phys(info->mm->pgd);
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2018-01-24 10:36:29 +00:00
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flush->address_space &= CR3_ADDR_MASK;
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2017-08-02 16:09:20 +00:00
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flush->flags = 0;
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} else {
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flush->address_space = 0;
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flush->flags = HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES;
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}
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flush->hv_vp_set.valid_bank_mask = 0;
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2018-06-21 13:32:38 +00:00
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flush->hv_vp_set.format = HV_GENERIC_SET_SPARSE_4K;
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nr_bank = cpumask_to_vpset(&(flush->hv_vp_set), cpus);
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2018-07-09 17:40:11 +00:00
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if (nr_bank < 0)
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2021-04-17 00:43:03 +00:00
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return HV_STATUS_INVALID_PARAMETER;
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2017-08-02 16:09:20 +00:00
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/*
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* We can flush not more than max_gvas with one hypercall. Flush the
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* whole address space if we were asked to do more.
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*/
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max_gvas =
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(PAGE_SIZE - sizeof(*flush) - nr_bank *
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sizeof(flush->hv_vp_set.bank_contents[0])) /
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sizeof(flush->gva_list[0]);
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if (info->end == TLB_FLUSH_ALL) {
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flush->flags |= HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY;
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status = hv_do_rep_hypercall(
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HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX,
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2017-10-05 13:34:29 +00:00
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0, nr_bank, flush, NULL);
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2017-08-02 16:09:20 +00:00
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} else if (info->end &&
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((info->end - info->start)/HV_TLB_FLUSH_UNIT) > max_gvas) {
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status = hv_do_rep_hypercall(
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HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX,
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2017-10-05 13:34:29 +00:00
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0, nr_bank, flush, NULL);
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2017-08-02 16:09:20 +00:00
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} else {
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gva_n = fill_gva_list(flush->gva_list, nr_bank,
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info->start, info->end);
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status = hv_do_rep_hypercall(
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HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX,
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2017-10-05 13:34:29 +00:00
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gva_n, nr_bank, flush, NULL);
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2017-08-02 16:09:20 +00:00
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}
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2018-06-21 13:32:38 +00:00
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return status;
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2017-08-02 16:09:20 +00:00
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}
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2017-08-02 16:09:19 +00:00
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void hyperv_setup_mmu_ops(void)
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{
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2017-08-02 16:09:20 +00:00
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if (!(ms_hyperv.hints & HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED))
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return;
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2018-06-21 13:32:38 +00:00
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pr_info("Using hypercall for remote TLB flush\n");
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2021-02-20 23:17:07 +00:00
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pv_ops.mmu.flush_tlb_multi = hyperv_flush_tlb_multi;
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2018-08-28 07:40:19 +00:00
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pv_ops.mmu.tlb_remove_table = tlb_remove_table;
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2017-08-02 16:09:19 +00:00
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}
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