License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 14:07:57 +00:00
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// SPDX-License-Identifier: GPL-2.0
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2005-04-16 22:20:36 +00:00
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/*
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* Copyright (C) 1991, 1992, 1995 Linus Torvalds
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* Copyright (C) 2000, 2003 Maciej W. Rozycki
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*
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* This file contains the time handling details for PC-style clocks as
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* found in some MIPS systems.
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*
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*/
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#include <linux/bcd.h>
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#include <linux/init.h>
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#include <linux/mc146818rtc.h>
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#include <linux/param.h>
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2008-04-25 03:11:44 +00:00
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#include <asm/cpu-features.h>
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#include <asm/ds1287.h>
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#include <asm/time.h>
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2005-04-16 22:20:36 +00:00
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#include <asm/dec/interrupts.h>
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#include <asm/dec/ioasic.h>
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#include <asm/dec/machtype.h>
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2018-05-07 09:28:27 +00:00
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void read_persistent_clock64(struct timespec64 *ts)
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2005-04-16 22:20:36 +00:00
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{
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unsigned int year, mon, day, hour, min, sec, real_year;
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2005-11-02 16:01:15 +00:00
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unsigned long flags;
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2005-04-16 22:20:36 +00:00
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2005-11-02 16:01:15 +00:00
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spin_lock_irqsave(&rtc_lock, flags);
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2006-03-28 09:56:06 +00:00
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2005-04-16 22:20:36 +00:00
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do {
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sec = CMOS_READ(RTC_SECONDS);
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min = CMOS_READ(RTC_MINUTES);
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hour = CMOS_READ(RTC_HOURS);
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day = CMOS_READ(RTC_DAY_OF_MONTH);
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mon = CMOS_READ(RTC_MONTH);
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year = CMOS_READ(RTC_YEAR);
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2006-03-28 09:56:06 +00:00
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/*
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* The PROM will reset the year to either '72 or '73.
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* Therefore we store the real year separately, in one
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* of unused BBU RAM locations.
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*/
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real_year = CMOS_READ(RTC_DEC_YEAR);
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2005-04-16 22:20:36 +00:00
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} while (sec != CMOS_READ(RTC_SECONDS));
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2006-03-28 09:56:06 +00:00
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spin_unlock_irqrestore(&rtc_lock, flags);
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2005-04-16 22:20:36 +00:00
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if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
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2008-10-19 03:28:44 +00:00
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sec = bcd2bin(sec);
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min = bcd2bin(min);
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hour = bcd2bin(hour);
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day = bcd2bin(day);
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mon = bcd2bin(mon);
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year = bcd2bin(year);
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2005-04-16 22:20:36 +00:00
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}
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2006-03-28 09:56:06 +00:00
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2005-04-16 22:20:36 +00:00
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year += real_year - 72 + 2000;
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2018-05-07 09:28:27 +00:00
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ts->tv_sec = mktime64(year, mon, day, hour, min, sec);
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2009-08-14 13:47:31 +00:00
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ts->tv_nsec = 0;
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2005-04-16 22:20:36 +00:00
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}
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/*
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2018-05-07 09:28:28 +00:00
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* In order to set the CMOS clock precisely, update_persistent_clock64 has to
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2005-04-16 22:20:36 +00:00
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* be called 500 ms after the second nowtime has started, because when
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* nowtime is written into the registers of the CMOS clock, it will
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* jump to the next second precisely 500 ms later. Check the Dallas
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* DS1287 data sheet for details.
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*/
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2018-05-07 09:28:28 +00:00
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int update_persistent_clock64(struct timespec64 now)
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2005-04-16 22:20:36 +00:00
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{
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2018-05-07 09:28:28 +00:00
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time64_t nowtime = now.tv_sec;
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2005-04-16 22:20:36 +00:00
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int retval = 0;
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int real_seconds, real_minutes, cmos_minutes;
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unsigned char save_control, save_freq_select;
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2005-11-02 16:01:15 +00:00
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/* irq are locally disabled here */
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spin_lock(&rtc_lock);
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2005-04-16 22:20:36 +00:00
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/* tell the clock it's being set */
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save_control = CMOS_READ(RTC_CONTROL);
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CMOS_WRITE((save_control | RTC_SET), RTC_CONTROL);
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/* stop and reset prescaler */
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save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
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CMOS_WRITE((save_freq_select | RTC_DIV_RESET2), RTC_FREQ_SELECT);
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cmos_minutes = CMOS_READ(RTC_MINUTES);
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if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
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2008-10-19 03:28:44 +00:00
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cmos_minutes = bcd2bin(cmos_minutes);
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2005-04-16 22:20:36 +00:00
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/*
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* since we're only adjusting minutes and seconds,
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* don't interfere with hour overflow. This avoids
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* messing with unknown time zones but requires your
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* RTC not to be off by more than 15 minutes
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*/
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2018-05-07 09:28:28 +00:00
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real_minutes = div_s64_rem(nowtime, 60, &real_seconds);
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2005-04-16 22:20:36 +00:00
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if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
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real_minutes += 30; /* correct for half hour time zone */
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real_minutes %= 60;
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if (abs(real_minutes - cmos_minutes) < 30) {
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if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
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2008-10-19 03:28:44 +00:00
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real_seconds = bin2bcd(real_seconds);
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real_minutes = bin2bcd(real_minutes);
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2005-04-16 22:20:36 +00:00
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}
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CMOS_WRITE(real_seconds, RTC_SECONDS);
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CMOS_WRITE(real_minutes, RTC_MINUTES);
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} else {
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2011-01-13 00:59:31 +00:00
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printk_once(KERN_NOTICE
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2005-04-16 22:20:36 +00:00
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"set_rtc_mmss: can't update from %d to %d\n",
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cmos_minutes, real_minutes);
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retval = -1;
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}
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/* The following flags have to be released exactly in this order,
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* otherwise the DS1287 will not reset the oscillator and will not
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* update precisely 500 ms later. You won't find this mentioned
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* in the Dallas Semiconductor data sheets, but who believes data
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* sheets anyway ... -- Markus Kuhn
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*/
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CMOS_WRITE(save_control, RTC_CONTROL);
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CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
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2005-11-02 16:01:15 +00:00
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spin_unlock(&rtc_lock);
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2005-04-16 22:20:36 +00:00
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return retval;
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}
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2008-04-25 03:11:44 +00:00
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void __init plat_time_init(void)
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2005-04-16 22:20:36 +00:00
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{
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2013-09-12 11:01:53 +00:00
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int ioasic_clock = 0;
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2008-04-25 03:11:44 +00:00
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u32 start, end;
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MIPS: DECstation HRT calibration bug fixes
This change corrects DECstation HRT calibration, by removing the following
bugs:
1. Calibration period selection -- HZ / 10 has been chosen, however on
DECstation computers, HZ never divides by 10, as the choice for HZ is
among 128, 256 and 1024. The choice therefore results in a systematic
calibration error, e.g. 6.25% for the usual choice of 128 for HZ:
128 / 10 * 10 = 120
(128 - 120) / 128 -> 6.25%
The change therefore makes calibration use HZ / 8 that is always
accurate for the HZ values available, getting rid of the systematic
error.
2. Calibration starting point synchronisation -- the duration of a number
of intervals between DS1287A periodic interrupt assertions is measured,
however code does not ensure at the beginning that the interrupt has
not been previously asserted. This results in a variable error of e.g.
up to another 6.25% for the period of HZ / 8 (8.(3)% with the original
HZ / 10 period) and the usual choice of 128 for HZ:
1 / 16 -> 6.25%
1 / 12 -> 8.(3)%
The change therefore adds an initial call to ds1287_timer_state that
clears any previous periodic interrupt pending.
The same issue applies to both I/O ASIC counter and R4k CP0 timer
calibration on DECstation systems as similar code is used in both cases
and both pieces of code are covered by this fix.
On an R3400 test system used this fix results in a change of the I/O ASIC
clock frequency reported from values like:
I/O ASIC clock frequency 23185830Hz
to:
I/O ASIC clock frequency 24999288Hz
removing the miscalculation by 6.25% from the systematic error and (for
the individual sample provided) a further 1.00% from the variable error,
accordingly. The nominal I/O ASIC clock frequency is 25MHz on this
system.
Here's another result, with the fix applied, from a system that has both
HRTs available (using an R4400 at 60MHz nominal):
MIPS counter frequency 59999328Hz
I/O ASIC clock frequency 24999432Hz
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5807/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04 22:47:45 +00:00
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int i = HZ / 8;
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2005-04-16 22:20:36 +00:00
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2008-04-25 03:11:44 +00:00
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/* Set up the rate of periodic DS1287 interrupts. */
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ds1287_set_base_clock(HZ);
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2005-04-16 22:20:36 +00:00
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2013-09-12 11:01:53 +00:00
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/* On some I/O ASIC systems we have the I/O ASIC's counter. */
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if (IOASIC)
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ioasic_clock = dec_ioasic_clocksource_init() == 0;
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2008-04-25 03:11:44 +00:00
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if (cpu_has_counter) {
|
MIPS: DECstation HRT calibration bug fixes
This change corrects DECstation HRT calibration, by removing the following
bugs:
1. Calibration period selection -- HZ / 10 has been chosen, however on
DECstation computers, HZ never divides by 10, as the choice for HZ is
among 128, 256 and 1024. The choice therefore results in a systematic
calibration error, e.g. 6.25% for the usual choice of 128 for HZ:
128 / 10 * 10 = 120
(128 - 120) / 128 -> 6.25%
The change therefore makes calibration use HZ / 8 that is always
accurate for the HZ values available, getting rid of the systematic
error.
2. Calibration starting point synchronisation -- the duration of a number
of intervals between DS1287A periodic interrupt assertions is measured,
however code does not ensure at the beginning that the interrupt has
not been previously asserted. This results in a variable error of e.g.
up to another 6.25% for the period of HZ / 8 (8.(3)% with the original
HZ / 10 period) and the usual choice of 128 for HZ:
1 / 16 -> 6.25%
1 / 12 -> 8.(3)%
The change therefore adds an initial call to ds1287_timer_state that
clears any previous periodic interrupt pending.
The same issue applies to both I/O ASIC counter and R4k CP0 timer
calibration on DECstation systems as similar code is used in both cases
and both pieces of code are covered by this fix.
On an R3400 test system used this fix results in a change of the I/O ASIC
clock frequency reported from values like:
I/O ASIC clock frequency 23185830Hz
to:
I/O ASIC clock frequency 24999288Hz
removing the miscalculation by 6.25% from the systematic error and (for
the individual sample provided) a further 1.00% from the variable error,
accordingly. The nominal I/O ASIC clock frequency is 25MHz on this
system.
Here's another result, with the fix applied, from a system that has both
HRTs available (using an R4400 at 60MHz nominal):
MIPS counter frequency 59999328Hz
I/O ASIC clock frequency 24999432Hz
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5807/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04 22:47:45 +00:00
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ds1287_timer_state();
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2008-04-25 03:11:44 +00:00
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while (!ds1287_timer_state())
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;
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2005-04-16 22:20:36 +00:00
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2008-04-25 03:11:44 +00:00
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start = read_c0_count();
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2005-04-16 22:20:36 +00:00
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2008-04-25 03:11:44 +00:00
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while (i--)
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while (!ds1287_timer_state())
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;
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end = read_c0_count();
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2005-04-16 22:20:36 +00:00
|
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|
MIPS: DECstation HRT calibration bug fixes
This change corrects DECstation HRT calibration, by removing the following
bugs:
1. Calibration period selection -- HZ / 10 has been chosen, however on
DECstation computers, HZ never divides by 10, as the choice for HZ is
among 128, 256 and 1024. The choice therefore results in a systematic
calibration error, e.g. 6.25% for the usual choice of 128 for HZ:
128 / 10 * 10 = 120
(128 - 120) / 128 -> 6.25%
The change therefore makes calibration use HZ / 8 that is always
accurate for the HZ values available, getting rid of the systematic
error.
2. Calibration starting point synchronisation -- the duration of a number
of intervals between DS1287A periodic interrupt assertions is measured,
however code does not ensure at the beginning that the interrupt has
not been previously asserted. This results in a variable error of e.g.
up to another 6.25% for the period of HZ / 8 (8.(3)% with the original
HZ / 10 period) and the usual choice of 128 for HZ:
1 / 16 -> 6.25%
1 / 12 -> 8.(3)%
The change therefore adds an initial call to ds1287_timer_state that
clears any previous periodic interrupt pending.
The same issue applies to both I/O ASIC counter and R4k CP0 timer
calibration on DECstation systems as similar code is used in both cases
and both pieces of code are covered by this fix.
On an R3400 test system used this fix results in a change of the I/O ASIC
clock frequency reported from values like:
I/O ASIC clock frequency 23185830Hz
to:
I/O ASIC clock frequency 24999288Hz
removing the miscalculation by 6.25% from the systematic error and (for
the individual sample provided) a further 1.00% from the variable error,
accordingly. The nominal I/O ASIC clock frequency is 25MHz on this
system.
Here's another result, with the fix applied, from a system that has both
HRTs available (using an R4400 at 60MHz nominal):
MIPS counter frequency 59999328Hz
I/O ASIC clock frequency 24999432Hz
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5807/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04 22:47:45 +00:00
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mips_hpt_frequency = (end - start) * 8;
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2008-04-25 03:11:44 +00:00
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printk(KERN_INFO "MIPS counter frequency %dHz\n",
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mips_hpt_frequency);
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2013-09-12 11:01:53 +00:00
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/*
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|
|
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* All R4k DECstations suffer from the CP0 Count erratum,
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|
|
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* so we can't use the timer as a clock source, and a clock
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|
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* event both at a time. An accurate wall clock is more
|
|
|
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* important than a high-precision interval timer so only
|
|
|
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* use the timer as a clock source, and not a clock event
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* if there's no I/O ASIC counter available to serve as a
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* clock source.
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|
|
|
*/
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|
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if (!ioasic_clock) {
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|
init_r4k_clocksource();
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|
|
|
mips_hpt_frequency = 0;
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|
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|
}
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}
|
2005-04-16 22:20:36 +00:00
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|
|
2008-04-25 03:11:44 +00:00
|
|
|
ds1287_clockevent_init(dec_interrupt[DEC_IRQ_RTC]);
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|