2011-06-04 18:56:48 +00:00
|
|
|
/*
|
|
|
|
* OpenRISC Linux
|
|
|
|
*
|
|
|
|
* Linux architectural port borrowing liberally from similar works of
|
|
|
|
* others. All original copyrights apply as per the original source
|
|
|
|
* declaration.
|
|
|
|
*
|
|
|
|
* OpenRISC implementation:
|
|
|
|
* Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License as published by
|
|
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
|
|
* (at your option) any later version.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef __ASM_OPENRISC_DMA_MAPPING_H
|
|
|
|
#define __ASM_OPENRISC_DMA_MAPPING_H
|
|
|
|
|
|
|
|
/*
|
2011-08-15 00:02:26 +00:00
|
|
|
* See Documentation/DMA-API-HOWTO.txt and
|
2011-06-04 18:56:48 +00:00
|
|
|
* Documentation/DMA-API.txt for documentation.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/dma-debug.h>
|
|
|
|
#include <asm-generic/dma-coherent.h>
|
|
|
|
#include <linux/kmemcheck.h>
|
2012-04-15 19:09:25 +00:00
|
|
|
#include <linux/dma-mapping.h>
|
2011-06-04 18:56:48 +00:00
|
|
|
|
|
|
|
#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
|
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
extern struct dma_map_ops or1k_dma_map_ops;
|
2011-06-04 18:56:48 +00:00
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
static inline struct dma_map_ops *get_dma_ops(struct device *dev)
|
2011-06-04 18:56:48 +00:00
|
|
|
{
|
2012-04-15 19:09:25 +00:00
|
|
|
return &or1k_dma_map_ops;
|
2011-06-04 18:56:48 +00:00
|
|
|
}
|
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
#include <asm-generic/dma-mapping-common.h>
|
2011-06-04 18:56:48 +00:00
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
|
2011-06-04 18:56:48 +00:00
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
static inline void *dma_alloc_attrs(struct device *dev, size_t size,
|
|
|
|
dma_addr_t *dma_handle, gfp_t gfp,
|
|
|
|
struct dma_attrs *attrs)
|
2011-06-04 18:56:48 +00:00
|
|
|
{
|
2012-04-15 19:09:25 +00:00
|
|
|
struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
void *memory;
|
2011-06-04 18:56:48 +00:00
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
memory = ops->alloc(dev, size, dma_handle, gfp, attrs);
|
2011-09-05 11:47:10 +00:00
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
|
2011-09-05 11:47:10 +00:00
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
return memory;
|
2011-09-05 11:47:10 +00:00
|
|
|
}
|
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
|
2011-09-05 11:47:10 +00:00
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
static inline void dma_free_attrs(struct device *dev, size_t size,
|
|
|
|
void *cpu_addr, dma_addr_t dma_handle,
|
|
|
|
struct dma_attrs *attrs)
|
2011-09-05 11:47:10 +00:00
|
|
|
{
|
2012-04-15 19:09:25 +00:00
|
|
|
struct dma_map_ops *ops = get_dma_ops(dev);
|
2011-09-05 11:47:10 +00:00
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
|
2011-09-05 11:47:10 +00:00
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
ops->free(dev, size, cpu_addr, dma_handle, attrs);
|
2011-09-05 11:47:10 +00:00
|
|
|
}
|
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
|
|
|
|
dma_addr_t *dma_handle, gfp_t gfp)
|
2011-09-05 11:47:10 +00:00
|
|
|
{
|
2012-04-15 19:09:25 +00:00
|
|
|
struct dma_attrs attrs;
|
2011-09-05 11:47:10 +00:00
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
dma_set_attr(DMA_ATTR_NON_CONSISTENT, &attrs);
|
|
|
|
|
|
|
|
return dma_alloc_attrs(dev, size, dma_handle, gfp, &attrs);
|
2011-06-04 18:56:48 +00:00
|
|
|
}
|
|
|
|
|
2012-04-15 19:09:25 +00:00
|
|
|
static inline void dma_free_noncoherent(struct device *dev, size_t size,
|
|
|
|
void *cpu_addr, dma_addr_t dma_handle)
|
2011-06-04 18:56:48 +00:00
|
|
|
{
|
2012-04-15 19:09:25 +00:00
|
|
|
struct dma_attrs attrs;
|
|
|
|
|
|
|
|
dma_set_attr(DMA_ATTR_NON_CONSISTENT, &attrs);
|
|
|
|
|
|
|
|
dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
|
2011-06-04 18:56:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline int dma_supported(struct device *dev, u64 dma_mask)
|
|
|
|
{
|
|
|
|
/* Support 32 bit DMA mask exclusively */
|
2011-09-05 11:47:10 +00:00
|
|
|
return dma_mask == DMA_BIT_MASK(32);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
|
|
|
{
|
|
|
|
return 0;
|
2011-06-04 18:56:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline int dma_set_mask(struct device *dev, u64 dma_mask)
|
|
|
|
{
|
|
|
|
if (!dev->dma_mask || !dma_supported(dev, dma_mask))
|
|
|
|
return -EIO;
|
|
|
|
|
|
|
|
*dev->dma_mask = dma_mask;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif /* __ASM_OPENRISC_DMA_MAPPING_H */
|