2006-09-21 18:31:26 +00:00
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/*
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* MPC8560 ADS Device Tree Source
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*
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* Copyright 2006 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/ {
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model = "MPC8560ADS";
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2007-02-17 22:04:23 +00:00
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compatible = "MPC8560ADS", "MPC85xxADS";
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2006-09-21 18:31:26 +00:00
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,8560@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <20>; // 32 bytes
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i-cache-line-size = <20>; // 32 bytes
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d-cache-size = <8000>; // L1, 32K
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i-cache-size = <8000>; // L1, 32K
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timebase-frequency = <04ead9a0>;
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bus-frequency = <13ab6680>;
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clock-frequency = <312c8040>;
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};
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};
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memory {
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device_type = "memory";
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reg = <00000000 10000000>;
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};
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soc8560@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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ranges = <0 e0000000 00100000>;
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reg = <e0000000 00000200>;
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bus-frequency = <13ab6680>;
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2007-05-10 17:03:05 +00:00
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memory-controller@2000 {
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compatible = "fsl,8540-memory-controller";
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reg = <2000 1000>;
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interrupt-parent = <&mpic>;
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2007-07-03 07:35:35 +00:00
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interrupts = <12 2>;
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2007-05-10 17:03:05 +00:00
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};
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l2-cache-controller@20000 {
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compatible = "fsl,8540-l2-cache-controller";
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reg = <20000 1000>;
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cache-line-size = <20>; // 32 bytes
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cache-size = <40000>; // L2, 256K
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interrupt-parent = <&mpic>;
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2007-07-03 07:35:35 +00:00
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interrupts = <10 2>;
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2007-05-10 17:03:05 +00:00
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};
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2006-09-21 18:31:26 +00:00
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mdio@24520 {
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device_type = "mdio";
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compatible = "gianfar";
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reg = <24520 20>;
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#address-cells = <1>;
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#size-cells = <0>;
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2007-02-17 22:04:23 +00:00
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phy0: ethernet-phy@0 {
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interrupt-parent = <&mpic>;
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2007-07-03 07:35:35 +00:00
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interrupts = <5 1>;
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2006-09-21 18:31:26 +00:00
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reg = <0>;
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device_type = "ethernet-phy";
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};
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2007-02-17 22:04:23 +00:00
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phy1: ethernet-phy@1 {
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interrupt-parent = <&mpic>;
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2007-07-03 07:35:35 +00:00
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interrupts = <5 1>;
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2006-09-21 18:31:26 +00:00
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reg = <1>;
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device_type = "ethernet-phy";
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};
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2007-02-17 22:04:23 +00:00
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phy2: ethernet-phy@2 {
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interrupt-parent = <&mpic>;
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2007-07-03 07:35:35 +00:00
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interrupts = <7 1>;
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2006-09-21 18:31:26 +00:00
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reg = <2>;
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device_type = "ethernet-phy";
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};
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2007-02-17 22:04:23 +00:00
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phy3: ethernet-phy@3 {
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interrupt-parent = <&mpic>;
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2007-07-03 07:35:35 +00:00
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interrupts = <7 1>;
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2006-09-21 18:31:26 +00:00
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reg = <3>;
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device_type = "ethernet-phy";
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};
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};
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ethernet@24000 {
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <24000 1000>;
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2007-06-22 19:33:15 +00:00
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/*
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* address is deprecated and will be removed
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* in 2.6.25. Only recent versions of
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* U-Boot support local-mac-address, however.
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*/
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address = [ 00 00 00 00 00 00 ];
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local-mac-address = [ 00 00 00 00 00 00 ];
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2007-07-03 07:35:35 +00:00
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interrupts = <1d 2 1e 2 22 2>;
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2007-02-17 22:04:23 +00:00
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interrupt-parent = <&mpic>;
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phy-handle = <&phy0>;
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2006-09-21 18:31:26 +00:00
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};
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ethernet@25000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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model = "TSEC";
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compatible = "gianfar";
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reg = <25000 1000>;
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2007-06-22 19:33:15 +00:00
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/*
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* address is deprecated and will be removed
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* in 2.6.25. Only recent versions of
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* U-Boot support local-mac-address, however.
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*/
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address = [ 00 00 00 00 00 00 ];
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local-mac-address = [ 00 00 00 00 00 00 ];
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2007-07-03 07:35:35 +00:00
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interrupts = <23 2 24 2 28 2>;
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2007-02-17 22:04:23 +00:00
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interrupt-parent = <&mpic>;
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phy-handle = <&phy1>;
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2006-09-21 18:31:26 +00:00
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};
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2007-02-17 22:04:23 +00:00
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mpic: pic@40000 {
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2006-09-21 18:31:26 +00:00
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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2007-02-17 22:04:23 +00:00
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reg = <40000 40000>;
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2006-09-21 18:31:26 +00:00
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device_type = "open-pic";
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};
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cpm@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "cpm";
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model = "CPM2";
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ranges = <0 0 c0000>;
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reg = <80000 40000>;
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command-proc = <919c0>;
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brg-frequency = <9d5b340>;
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2007-02-17 22:04:23 +00:00
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cpmpic: pic@90c00 {
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2006-09-21 18:31:26 +00:00
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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2007-07-03 08:05:58 +00:00
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interrupts = <2e 2>;
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2007-02-17 22:04:23 +00:00
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interrupt-parent = <&mpic>;
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2006-09-21 18:31:26 +00:00
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reg = <90c00 80>;
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device_type = "cpm-pic";
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};
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scc@91a00 {
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device_type = "serial";
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compatible = "cpm_uart";
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model = "SCC";
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POWERPC: Bring the fs_no calculation to the relevant SoC enumeration
The fs_no mean used to be fs_enet driver driven, hence it was an
enumeration across all the possible fs_enet "users" in the SoC. Now, with
QE on the pipeline, and to make DTS descriptions more clear, fs_no features
relevant SoC part number, with additional field to describe the SoC type.
Another reason for that is now not only fs_enet is going to utilize those
stuff. There might be UART, HLDC, and even USB, so to prevent confusion and
be ready for upcoming OF_device transfer, fs_enet and cpm_uart drivers were
updated in that concern, as well as the relevant DTS.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 18:38:05 +00:00
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device-id = <1>;
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2006-09-21 18:31:26 +00:00
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reg = <91a00 20 88000 100>;
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clock-setup = <00ffffff 0>;
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rx-clock = <1>;
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tx-clock = <1>;
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current-speed = <1c200>;
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2007-01-30 23:08:54 +00:00
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interrupts = <28 8>;
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2007-02-17 22:04:23 +00:00
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interrupt-parent = <&cpmpic>;
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2006-09-21 18:31:26 +00:00
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};
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scc@91a20 {
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device_type = "serial";
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compatible = "cpm_uart";
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model = "SCC";
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POWERPC: Bring the fs_no calculation to the relevant SoC enumeration
The fs_no mean used to be fs_enet driver driven, hence it was an
enumeration across all the possible fs_enet "users" in the SoC. Now, with
QE on the pipeline, and to make DTS descriptions more clear, fs_no features
relevant SoC part number, with additional field to describe the SoC type.
Another reason for that is now not only fs_enet is going to utilize those
stuff. There might be UART, HLDC, and even USB, so to prevent confusion and
be ready for upcoming OF_device transfer, fs_enet and cpm_uart drivers were
updated in that concern, as well as the relevant DTS.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 18:38:05 +00:00
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device-id = <2>;
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2006-09-21 18:31:26 +00:00
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reg = <91a20 20 88100 100>;
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clock-setup = <ff00ffff 90000>;
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rx-clock = <2>;
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tx-clock = <2>;
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current-speed = <1c200>;
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2007-01-30 23:08:54 +00:00
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interrupts = <29 8>;
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2007-02-17 22:04:23 +00:00
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interrupt-parent = <&cpmpic>;
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2006-09-21 18:31:26 +00:00
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};
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fcc@91320 {
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device_type = "network";
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compatible = "fs_enet";
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model = "FCC";
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POWERPC: Bring the fs_no calculation to the relevant SoC enumeration
The fs_no mean used to be fs_enet driver driven, hence it was an
enumeration across all the possible fs_enet "users" in the SoC. Now, with
QE on the pipeline, and to make DTS descriptions more clear, fs_no features
relevant SoC part number, with additional field to describe the SoC type.
Another reason for that is now not only fs_enet is going to utilize those
stuff. There might be UART, HLDC, and even USB, so to prevent confusion and
be ready for upcoming OF_device transfer, fs_enet and cpm_uart drivers were
updated in that concern, as well as the relevant DTS.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 18:38:05 +00:00
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device-id = <2>;
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2006-09-21 18:31:26 +00:00
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reg = <91320 20 88500 100 913a0 30>;
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2007-06-22 19:33:15 +00:00
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/*
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* mac-address is deprecated and will be removed
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* in 2.6.25. Only recent versions of
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* U-Boot support local-mac-address, however.
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*/
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mac-address = [ 00 00 00 00 00 00 ];
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local-mac-address = [ 00 00 00 00 00 00 ];
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2006-09-21 18:31:26 +00:00
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clock-setup = <ff00ffff 250000>;
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rx-clock = <15>;
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tx-clock = <16>;
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2007-01-30 23:08:54 +00:00
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interrupts = <21 8>;
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2007-02-17 22:04:23 +00:00
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interrupt-parent = <&cpmpic>;
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phy-handle = <&phy2>;
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2006-09-21 18:31:26 +00:00
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};
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fcc@91340 {
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device_type = "network";
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compatible = "fs_enet";
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model = "FCC";
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POWERPC: Bring the fs_no calculation to the relevant SoC enumeration
The fs_no mean used to be fs_enet driver driven, hence it was an
enumeration across all the possible fs_enet "users" in the SoC. Now, with
QE on the pipeline, and to make DTS descriptions more clear, fs_no features
relevant SoC part number, with additional field to describe the SoC type.
Another reason for that is now not only fs_enet is going to utilize those
stuff. There might be UART, HLDC, and even USB, so to prevent confusion and
be ready for upcoming OF_device transfer, fs_enet and cpm_uart drivers were
updated in that concern, as well as the relevant DTS.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
2006-09-21 18:38:05 +00:00
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device-id = <3>;
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2006-09-21 18:31:26 +00:00
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reg = <91340 20 88600 100 913d0 30>;
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2007-06-22 19:33:15 +00:00
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/*
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* mac-address is deprecated and will be removed
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* in 2.6.25. Only recent versions of
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* U-Boot support local-mac-address, however.
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*/
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mac-address = [ 00 00 00 00 00 00 ];
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local-mac-address = [ 00 00 00 00 00 00 ];
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2006-09-21 18:31:26 +00:00
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clock-setup = <ffff00ff 3700>;
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rx-clock = <17>;
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tx-clock = <18>;
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2007-01-30 23:08:54 +00:00
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interrupts = <22 8>;
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2007-02-17 22:04:23 +00:00
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interrupt-parent = <&cpmpic>;
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phy-handle = <&phy3>;
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2006-09-21 18:31:26 +00:00
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};
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};
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};
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2007-09-12 23:23:46 +00:00
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pci@e0008000 {
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
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device_type = "pci";
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reg = <e0008000 1000>;
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clock-frequency = <3f940aa>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x2 */
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1000 0 0 1 &mpic 1 1
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1000 0 0 2 &mpic 2 1
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1000 0 0 3 &mpic 3 1
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1000 0 0 4 &mpic 4 1
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/* IDSEL 0x3 */
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1800 0 0 1 &mpic 4 1
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1800 0 0 2 &mpic 1 1
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1800 0 0 3 &mpic 2 1
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1800 0 0 4 &mpic 3 1
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/* IDSEL 0x4 */
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2000 0 0 1 &mpic 3 1
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2000 0 0 2 &mpic 4 1
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2000 0 0 3 &mpic 1 1
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2000 0 0 4 &mpic 2 1
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/* IDSEL 0x5 */
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2800 0 0 1 &mpic 2 1
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2800 0 0 2 &mpic 3 1
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2800 0 0 3 &mpic 4 1
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2800 0 0 4 &mpic 1 1
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/* IDSEL 12 */
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6000 0 0 1 &mpic 1 1
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6000 0 0 2 &mpic 2 1
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6000 0 0 3 &mpic 3 1
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6000 0 0 4 &mpic 4 1
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|
|
|
/* IDSEL 13 */
|
|
|
|
|
6800 0 0 1 &mpic 4 1
|
|
|
|
|
6800 0 0 2 &mpic 1 1
|
|
|
|
|
6800 0 0 3 &mpic 2 1
|
|
|
|
|
6800 0 0 4 &mpic 3 1
|
|
|
|
|
|
|
|
|
|
/* IDSEL 14*/
|
|
|
|
|
7000 0 0 1 &mpic 3 1
|
|
|
|
|
7000 0 0 2 &mpic 4 1
|
|
|
|
|
7000 0 0 3 &mpic 1 1
|
|
|
|
|
7000 0 0 4 &mpic 2 1
|
|
|
|
|
|
|
|
|
|
/* IDSEL 15 */
|
|
|
|
|
7800 0 0 1 &mpic 2 1
|
|
|
|
|
7800 0 0 2 &mpic 3 1
|
|
|
|
|
7800 0 0 3 &mpic 4 1
|
|
|
|
|
7800 0 0 4 &mpic 1 1
|
|
|
|
|
|
|
|
|
|
/* IDSEL 18 */
|
|
|
|
|
9000 0 0 1 &mpic 1 1
|
|
|
|
|
9000 0 0 2 &mpic 2 1
|
|
|
|
|
9000 0 0 3 &mpic 3 1
|
|
|
|
|
9000 0 0 4 &mpic 4 1
|
|
|
|
|
|
|
|
|
|
/* IDSEL 19 */
|
|
|
|
|
9800 0 0 1 &mpic 4 1
|
|
|
|
|
9800 0 0 2 &mpic 1 1
|
|
|
|
|
9800 0 0 3 &mpic 2 1
|
|
|
|
|
9800 0 0 4 &mpic 3 1
|
|
|
|
|
|
|
|
|
|
/* IDSEL 20 */
|
|
|
|
|
a000 0 0 1 &mpic 3 1
|
|
|
|
|
a000 0 0 2 &mpic 4 1
|
|
|
|
|
a000 0 0 3 &mpic 1 1
|
|
|
|
|
a000 0 0 4 &mpic 2 1
|
|
|
|
|
|
|
|
|
|
/* IDSEL 21 */
|
|
|
|
|
a800 0 0 1 &mpic 2 1
|
|
|
|
|
a800 0 0 2 &mpic 3 1
|
|
|
|
|
a800 0 0 3 &mpic 4 1
|
|
|
|
|
a800 0 0 4 &mpic 1 1>;
|
|
|
|
|
|
|
|
|
|
interrupt-parent = <&mpic>;
|
|
|
|
|
interrupts = <18 2>;
|
|
|
|
|
bus-range = <0 0>;
|
|
|
|
|
ranges = <02000000 0 80000000 80000000 0 20000000
|
|
|
|
|
01000000 0 00000000 e2000000 0 01000000>;
|
|
|
|
|
};
|
2006-09-21 18:31:26 +00:00
|
|
|
};
|
