2006-12-28 17:22:32 +00:00
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/*
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* RM200 specific code
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <asm/sni.h>
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#include <asm/time.h>
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#include <asm/irq_cpu.h>
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#define PORT(_base,_irq) \
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{ \
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.iobase = _base, \
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.irq = _irq, \
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.uartclk = 1843200, \
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.iotype = UPIO_PORT, \
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.flags = UPF_BOOT_AUTOCONF, \
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}
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static struct plat_serial8250_port rm200_data[] = {
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PORT(0x3f8, 4),
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PORT(0x2f8, 3),
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{ },
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};
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static struct platform_device rm200_serial8250_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = rm200_data,
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},
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};
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2007-06-20 21:36:47 +00:00
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static struct resource rm200_ds1216_rsrc[] = {
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{
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.start = 0x1cd41ffc,
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.end = 0x1cd41fff,
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.flags = IORESOURCE_MEM
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}
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};
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static struct platform_device rm200_ds1216_device = {
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.name = "rtc-ds1216",
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.num_resources = ARRAY_SIZE(rm200_ds1216_rsrc),
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.resource = rm200_ds1216_rsrc
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};
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2006-12-28 17:22:32 +00:00
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static struct resource snirm_82596_rm200_rsrc[] = {
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{
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2007-06-20 21:36:47 +00:00
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.start = 0x18000000,
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.end = 0x180fffff,
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2006-12-28 17:22:32 +00:00
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.flags = IORESOURCE_MEM
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},
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{
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2007-06-20 21:36:47 +00:00
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.start = 0x1b000000,
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.end = 0x1b000004,
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2006-12-28 17:22:32 +00:00
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.flags = IORESOURCE_MEM
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},
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{
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2007-06-20 21:36:47 +00:00
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.start = 0x1ff00000,
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.end = 0x1ff00020,
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2006-12-28 17:22:32 +00:00
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.flags = IORESOURCE_MEM
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},
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{
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.start = 27,
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.end = 27,
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.flags = IORESOURCE_IRQ
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},
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{
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.flags = 0x00
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}
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};
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static struct platform_device snirm_82596_rm200_pdev = {
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.name = "snirm_82596",
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.num_resources = ARRAY_SIZE(snirm_82596_rm200_rsrc),
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.resource = snirm_82596_rm200_rsrc
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};
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static struct resource snirm_53c710_rm200_rsrc[] = {
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{
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2007-07-11 17:10:39 +00:00
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.start = 0x19000000,
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.end = 0x190fffff,
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2006-12-28 17:22:32 +00:00
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.flags = IORESOURCE_MEM
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},
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{
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.start = 26,
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.end = 26,
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.flags = IORESOURCE_IRQ
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}
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};
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static struct platform_device snirm_53c710_rm200_pdev = {
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.name = "snirm_53c710",
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.num_resources = ARRAY_SIZE(snirm_53c710_rm200_rsrc),
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.resource = snirm_53c710_rm200_rsrc
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};
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static int __init snirm_setup_devinit(void)
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{
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if (sni_brd_type == SNI_BRD_RM200) {
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platform_device_register(&rm200_serial8250_device);
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2007-06-20 21:36:47 +00:00
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platform_device_register(&rm200_ds1216_device);
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2006-12-28 17:22:32 +00:00
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platform_device_register(&snirm_82596_rm200_pdev);
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platform_device_register(&snirm_53c710_rm200_pdev);
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}
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return 0;
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}
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device_initcall(snirm_setup_devinit);
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#define SNI_RM200_INT_STAT_REG 0xbc000000
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#define SNI_RM200_INT_ENA_REG 0xbc080000
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#define SNI_RM200_INT_START 24
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#define SNI_RM200_INT_END 28
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static void enable_rm200_irq(unsigned int irq)
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{
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unsigned int mask = 1 << (irq - SNI_RM200_INT_START);
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*(volatile u8 *)SNI_RM200_INT_ENA_REG &= ~mask;
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}
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void disable_rm200_irq(unsigned int irq)
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{
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unsigned int mask = 1 << (irq - SNI_RM200_INT_START);
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*(volatile u8 *)SNI_RM200_INT_ENA_REG |= mask;
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}
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void end_rm200_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_rm200_irq(irq);
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}
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static struct irq_chip rm200_irq_type = {
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.typename = "RM200",
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.ack = disable_rm200_irq,
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.mask = disable_rm200_irq,
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.mask_ack = disable_rm200_irq,
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.unmask = enable_rm200_irq,
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.end = end_rm200_irq,
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};
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static void sni_rm200_hwint(void)
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{
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u32 pending = read_c0_cause() & read_c0_status();
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u8 mask;
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u8 stat;
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int irq;
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if (pending & C_IRQ5)
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2007-10-11 22:46:15 +00:00
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do_IRQ(MIPS_CPU_IRQ_BASE + 7);
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2006-12-28 17:22:32 +00:00
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else if (pending & C_IRQ0) {
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2007-10-11 22:46:15 +00:00
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clear_c0_status(IE_IRQ0);
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2006-12-28 17:22:32 +00:00
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mask = *(volatile u8 *)SNI_RM200_INT_ENA_REG ^ 0x1f;
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stat = *(volatile u8 *)SNI_RM200_INT_STAT_REG ^ 0x14;
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irq = ffs(stat & mask & 0x1f);
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if (likely(irq > 0))
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2007-10-11 22:46:15 +00:00
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do_IRQ(irq + SNI_RM200_INT_START - 1);
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set_c0_status(IE_IRQ0);
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2006-12-28 17:22:32 +00:00
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}
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}
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void __init sni_rm200_irq_init(void)
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{
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int i;
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* (volatile u8 *)SNI_RM200_INT_ENA_REG = 0x1f;
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mips_cpu_irq_init();
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/* Actually we've got more interrupts to handle ... */
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for (i = SNI_RM200_INT_START; i <= SNI_RM200_INT_END; i++)
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set_irq_chip(i, &rm200_irq_type);
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sni_hwint = sni_rm200_hwint;
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change_c0_status(ST0_IM, IE_IRQ0);
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2007-10-11 22:46:15 +00:00
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setup_irq(SNI_RM200_INT_START + 0, &sni_isa_irq);
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2006-12-28 17:22:32 +00:00
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}
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2007-06-20 21:36:47 +00:00
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void __init sni_rm200_init(void)
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2006-12-28 17:22:32 +00:00
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{
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set_io_port_base(SNI_PORT_BASE + 0x02000000);
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ioport_resource.end += 0x02000000;
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}
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