2008-05-19 23:52:27 +00:00
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/*
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2005-04-16 22:20:36 +00:00
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* rtrap.S: Preparing for return from trap on Sparc V9.
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*
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* Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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* Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
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*/
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#include <asm/asi.h>
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#include <asm/pstate.h>
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#include <asm/ptrace.h>
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#include <asm/spitfire.h>
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#include <asm/head.h>
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#include <asm/visasm.h>
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#include <asm/processor.h>
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#define RTRAP_PSTATE (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV|PSTATE_IE)
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#define RTRAP_PSTATE_IRQOFF (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV)
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#define RTRAP_PSTATE_AG_IRQOFF (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV|PSTATE_AG)
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.text
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.align 32
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__handle_softirq:
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call do_softirq
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nop
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ba,a,pt %xcc, __handle_softirq_continue
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nop
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__handle_preemption:
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call schedule
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wrpr %g0, RTRAP_PSTATE, %pstate
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ba,pt %xcc, __handle_preemption_continue
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wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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__handle_user_windows:
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call fault_in_user_windows
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wrpr %g0, RTRAP_PSTATE, %pstate
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wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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/* Redo sched+sig checks */
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ldx [%g6 + TI_FLAGS], %l0
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andcc %l0, _TIF_NEED_RESCHED, %g0
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be,pt %xcc, 1f
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nop
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call schedule
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wrpr %g0, RTRAP_PSTATE, %pstate
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wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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ldx [%g6 + TI_FLAGS], %l0
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2008-05-13 05:45:15 +00:00
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1: andcc %l0, _TIF_SIGPENDING, %g0
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2005-04-16 22:20:36 +00:00
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be,pt %xcc, __handle_user_windows_continue
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nop
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2006-01-19 10:42:49 +00:00
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mov %l5, %o1
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add %sp, PTREGS_OFF, %o0
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2008-04-24 10:15:22 +00:00
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mov %l0, %o2
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2005-04-16 22:20:36 +00:00
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call do_notify_resume
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wrpr %g0, RTRAP_PSTATE, %pstate
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wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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/* Signal delivery can modify pt_regs tstate, so we must
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* reload it.
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*/
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ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
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sethi %hi(0xf << 20), %l4
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and %l1, %l4, %l4
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ba,pt %xcc, __handle_user_windows_continue
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andn %l1, %l4, %l1
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__handle_perfctrs:
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call update_perfctrs
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wrpr %g0, RTRAP_PSTATE, %pstate
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wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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ldub [%g6 + TI_WSAVED], %o2
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brz,pt %o2, 1f
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nop
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/* Redo userwin+sched+sig checks */
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call fault_in_user_windows
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wrpr %g0, RTRAP_PSTATE, %pstate
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wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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ldx [%g6 + TI_FLAGS], %l0
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andcc %l0, _TIF_NEED_RESCHED, %g0
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be,pt %xcc, 1f
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nop
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call schedule
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wrpr %g0, RTRAP_PSTATE, %pstate
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wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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ldx [%g6 + TI_FLAGS], %l0
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2008-05-13 05:45:15 +00:00
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1: andcc %l0, _TIF_SIGPENDING, %g0
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2005-04-16 22:20:36 +00:00
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be,pt %xcc, __handle_perfctrs_continue
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sethi %hi(TSTATE_PEF), %o0
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2006-01-19 10:42:49 +00:00
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mov %l5, %o1
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add %sp, PTREGS_OFF, %o0
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2008-04-24 10:15:22 +00:00
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mov %l0, %o2
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2005-04-16 22:20:36 +00:00
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call do_notify_resume
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wrpr %g0, RTRAP_PSTATE, %pstate
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wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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/* Signal delivery can modify pt_regs tstate, so we must
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* reload it.
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*/
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ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
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sethi %hi(0xf << 20), %l4
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and %l1, %l4, %l4
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andn %l1, %l4, %l1
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ba,pt %xcc, __handle_perfctrs_continue
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sethi %hi(TSTATE_PEF), %o0
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__handle_userfpu:
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rd %fprs, %l5
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andcc %l5, FPRS_FEF, %g0
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sethi %hi(TSTATE_PEF), %o0
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be,a,pn %icc, __handle_userfpu_continue
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andn %l1, %o0, %l1
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ba,a,pt %xcc, __handle_userfpu_continue
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__handle_signal:
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2006-01-19 10:42:49 +00:00
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mov %l5, %o1
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add %sp, PTREGS_OFF, %o0
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2008-04-24 10:15:22 +00:00
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mov %l0, %o2
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2005-04-16 22:20:36 +00:00
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call do_notify_resume
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wrpr %g0, RTRAP_PSTATE, %pstate
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wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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/* Signal delivery can modify pt_regs tstate, so we must
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* reload it.
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*/
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ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
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sethi %hi(0xf << 20), %l4
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and %l1, %l4, %l4
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ba,pt %xcc, __handle_signal_continue
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andn %l1, %l4, %l1
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.align 64
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2008-04-24 10:15:22 +00:00
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.globl rtrap_irq, rtrap, irqsz_patchme, rtrap_xcall
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2005-04-16 22:20:36 +00:00
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rtrap_irq:
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rtrap:
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2005-08-30 05:46:43 +00:00
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#ifndef CONFIG_SMP
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sethi %hi(per_cpu____cpu_data), %l0
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lduw [%l0 + %lo(per_cpu____cpu_data)], %l1
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#else
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sethi %hi(per_cpu____cpu_data), %l0
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or %l0, %lo(per_cpu____cpu_data), %l0
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lduw [%l0 + %g5], %l1
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#endif
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2005-04-16 22:20:36 +00:00
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cmp %l1, 0
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/* mm/ultra.S:xcall_report_regs KNOWS about this load. */
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bne,pn %icc, __handle_softirq
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ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
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__handle_softirq_continue:
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rtrap_xcall:
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sethi %hi(0xf << 20), %l4
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and %l1, %l4, %l4
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2006-11-16 21:38:57 +00:00
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andn %l1, %l4, %l1
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srl %l4, 20, %l4
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#ifdef CONFIG_TRACE_IRQFLAGS
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brnz,pn %l4, rtrap_no_irq_enable
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nop
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call trace_hardirqs_on
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nop
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wrpr %l4, %pil
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rtrap_no_irq_enable:
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#endif
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andcc %l1, TSTATE_PRIV, %l3
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2005-04-16 22:20:36 +00:00
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bne,pn %icc, to_kernel
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2006-11-16 21:38:57 +00:00
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nop
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2005-04-16 22:20:36 +00:00
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/* We must hold IRQs off and atomically test schedule+signal
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* state, then hold them off all the way back to userspace.
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2006-11-16 21:38:57 +00:00
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* If we are returning to kernel, none of this matters. Note
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* that we are disabling interrupts via PSTATE_IE, not using
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* %pil.
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2005-04-16 22:20:36 +00:00
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*
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* If we do not do this, there is a window where we would do
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* the tests, later the signal/resched event arrives but we do
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* not process it since we are still in kernel mode. It would
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* take until the next local IRQ before the signal/resched
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* event would be handled.
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*
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* This also means that if we have to deal with performance
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* counters or user windows, we have to redo all of these
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* sched+signal checks with IRQs disabled.
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*/
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to_user: wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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wrpr 0, %pil
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__handle_preemption_continue:
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ldx [%g6 + TI_FLAGS], %l0
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sethi %hi(_TIF_USER_WORK_MASK), %o0
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or %o0, %lo(_TIF_USER_WORK_MASK), %o0
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andcc %l0, %o0, %g0
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sethi %hi(TSTATE_PEF), %o0
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be,pt %xcc, user_nowork
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andcc %l1, %o0, %g0
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andcc %l0, _TIF_NEED_RESCHED, %g0
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bne,pn %xcc, __handle_preemption
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2008-05-13 05:45:15 +00:00
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andcc %l0, _TIF_SIGPENDING, %g0
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2005-04-16 22:20:36 +00:00
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bne,pn %xcc, __handle_signal
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__handle_signal_continue:
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ldub [%g6 + TI_WSAVED], %o2
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brnz,pn %o2, __handle_user_windows
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nop
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__handle_user_windows_continue:
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ldx [%g6 + TI_FLAGS], %l5
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andcc %l5, _TIF_PERFCTR, %g0
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sethi %hi(TSTATE_PEF), %o0
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bne,pn %xcc, __handle_perfctrs
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__handle_perfctrs_continue:
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andcc %l1, %o0, %g0
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/* This fpdepth clear is necessary for non-syscall rtraps only */
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user_nowork:
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bne,pn %xcc, __handle_userfpu
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stb %g0, [%g6 + TI_FPDEPTH]
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__handle_userfpu_continue:
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rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1
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ldx [%sp + PTREGS_OFF + PT_V9_G2], %g2
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ldx [%sp + PTREGS_OFF + PT_V9_G3], %g3
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ldx [%sp + PTREGS_OFF + PT_V9_G4], %g4
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ldx [%sp + PTREGS_OFF + PT_V9_G5], %g5
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2006-02-27 07:24:22 +00:00
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brz,pt %l3, 1f
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2006-02-06 05:59:03 +00:00
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mov %g6, %l2
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2006-02-27 07:24:22 +00:00
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/* Must do this before thread reg is clobbered below. */
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2006-02-03 05:55:10 +00:00
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LOAD_PER_CPU_BASE(%g5, %g6, %i0, %i1, %i2)
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2006-02-01 02:29:18 +00:00
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1:
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ldx [%sp + PTREGS_OFF + PT_V9_G6], %g6
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2005-04-16 22:20:36 +00:00
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ldx [%sp + PTREGS_OFF + PT_V9_G7], %g7
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2006-02-06 05:29:28 +00:00
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/* Normal globals are restored, go to trap globals. */
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661: wrpr %g0, RTRAP_PSTATE_AG_IRQOFF, %pstate
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2006-02-17 00:23:45 +00:00
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nop
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.section .sun4v_2insn_patch, "ax"
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2006-02-06 05:29:28 +00:00
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.word 661b
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2006-02-17 00:23:45 +00:00
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wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
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2006-02-06 05:29:28 +00:00
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SET_GL(1)
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.previous
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2006-02-06 05:59:03 +00:00
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mov %l2, %g6
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2005-04-16 22:20:36 +00:00
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ldx [%sp + PTREGS_OFF + PT_V9_I0], %i0
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ldx [%sp + PTREGS_OFF + PT_V9_I1], %i1
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ldx [%sp + PTREGS_OFF + PT_V9_I2], %i2
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ldx [%sp + PTREGS_OFF + PT_V9_I3], %i3
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ldx [%sp + PTREGS_OFF + PT_V9_I4], %i4
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ldx [%sp + PTREGS_OFF + PT_V9_I5], %i5
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ldx [%sp + PTREGS_OFF + PT_V9_I6], %i6
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ldx [%sp + PTREGS_OFF + PT_V9_I7], %i7
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ldx [%sp + PTREGS_OFF + PT_V9_TPC], %l2
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ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %o2
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ld [%sp + PTREGS_OFF + PT_V9_Y], %o3
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wr %o3, %g0, %y
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wrpr %l4, 0x0, %pil
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wrpr %g0, 0x1, %tl
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sparc: Fix debugger syscall restart interactions.
So, forever, we've had this ptrace_signal_deliver implementation
which tries to handle all of the nasties that can occur when the
debugger looks at a process about to take a signal. It's meant
to address all of these issues inside of the kernel so that the
debugger need not be mindful of such things.
Problem is, this doesn't work.
The idea was that we should do the syscall restart business first, so
that the debugger captures that state. Otherwise, if the debugger for
example saves the child's state, makes the child execute something
else, then restores the saved state, we won't handle the syscall
restart properly because we lose the "we're in a syscall" state.
The code here worked for most cases, but if the debugger actually
passes the signal through to the child unaltered, it's possible that
we would do a syscall restart when we shouldn't have.
In particular this breaks the case of debugging a process under a gdb
which is being debugged by yet another gdb. gdb uses sigsuspend
to wait for SIGCHLD of the inferior, but if gdb itself is being
debugged by a top-level gdb we get a ptrace_stop(). The top-level gdb
does a PTRACE_CONT with SIGCHLD to let the inferior gdb see the
signal. But ptrace_signal_deliver() assumed the debugger would cancel
out the signal and therefore did a syscall restart, because the return
error was ERESTARTNOHAND.
Fix this by simply making ptrace_signal_deliver() a nop, and providing
a way for the debugger to control system call restarting properly:
1) Report a "in syscall" software bit in regs->{tstate,psr}.
It is set early on in trap entry to a system call and is fully
visible to the debugger via ptrace() and regsets.
2) Test this bit right before doing a syscall restart. We have
to do a final recheck right after get_signal_to_deliver() in
case the debugger cleared the bit during ptrace_stop().
3) Clear the bit in trap return so we don't accidently try to set
that bit in the real register.
As a result we also get a ptrace_{is,clear}_syscall() for sparc32 just
like sparc64 has.
M68K has this same exact bug, and is now the only other user of the
ptrace_signal_deliver hook. It needs to be fixed in the same exact
way as sparc.
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-05-11 09:07:19 +00:00
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andn %l1, TSTATE_SYSCALL, %l1
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2005-04-16 22:20:36 +00:00
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wrpr %l1, %g0, %tstate
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wrpr %l2, %g0, %tpc
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wrpr %o2, %g0, %tnpc
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brnz,pn %l3, kern_rtt
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mov PRIMARY_CONTEXT, %l7
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2006-02-08 06:13:05 +00:00
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661: ldxa [%l7 + %l7] ASI_DMMU, %l0
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.section .sun4v_1insn_patch, "ax"
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.word 661b
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ldxa [%l7 + %l7] ASI_MMU, %l0
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.previous
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2005-10-04 22:23:20 +00:00
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sethi %hi(sparc64_kern_pri_nuc_bits), %l1
|
|
|
|
ldx [%l1 + %lo(sparc64_kern_pri_nuc_bits)], %l1
|
2005-04-16 22:20:36 +00:00
|
|
|
or %l0, %l1, %l0
|
2006-02-08 06:13:05 +00:00
|
|
|
|
|
|
|
661: stxa %l0, [%l7] ASI_DMMU
|
|
|
|
.section .sun4v_1insn_patch, "ax"
|
|
|
|
.word 661b
|
|
|
|
stxa %l0, [%l7] ASI_MMU
|
|
|
|
.previous
|
|
|
|
|
2006-02-01 02:33:00 +00:00
|
|
|
sethi %hi(KERNBASE), %l7
|
|
|
|
flush %l7
|
2005-04-16 22:20:36 +00:00
|
|
|
rdpr %wstate, %l1
|
|
|
|
rdpr %otherwin, %l2
|
|
|
|
srl %l1, 3, %l1
|
|
|
|
|
|
|
|
wrpr %l2, %g0, %canrestore
|
|
|
|
wrpr %l1, %g0, %wstate
|
2006-02-04 08:10:01 +00:00
|
|
|
brnz,pt %l2, user_rtt_restore
|
|
|
|
wrpr %g0, %g0, %otherwin
|
|
|
|
|
|
|
|
ldx [%g6 + TI_FLAGS], %g3
|
|
|
|
wr %g0, ASI_AIUP, %asi
|
|
|
|
rdpr %cwp, %g1
|
|
|
|
andcc %g3, _TIF_32BIT, %g0
|
|
|
|
sub %g1, 1, %g1
|
|
|
|
bne,pt %xcc, user_rtt_fill_32bit
|
|
|
|
wrpr %g1, %cwp
|
|
|
|
ba,a,pt %xcc, user_rtt_fill_64bit
|
|
|
|
|
|
|
|
user_rtt_fill_fixup:
|
|
|
|
rdpr %cwp, %g1
|
|
|
|
add %g1, 1, %g1
|
|
|
|
wrpr %g1, 0x0, %cwp
|
|
|
|
|
|
|
|
rdpr %wstate, %g2
|
|
|
|
sll %g2, 3, %g2
|
|
|
|
wrpr %g2, 0x0, %wstate
|
|
|
|
|
|
|
|
/* We know %canrestore and %otherwin are both zero. */
|
|
|
|
|
|
|
|
sethi %hi(sparc64_kern_pri_context), %g2
|
|
|
|
ldx [%g2 + %lo(sparc64_kern_pri_context)], %g2
|
|
|
|
mov PRIMARY_CONTEXT, %g1
|
2006-02-08 06:13:05 +00:00
|
|
|
|
|
|
|
661: stxa %g2, [%g1] ASI_DMMU
|
|
|
|
.section .sun4v_1insn_patch, "ax"
|
|
|
|
.word 661b
|
|
|
|
stxa %g2, [%g1] ASI_MMU
|
|
|
|
.previous
|
|
|
|
|
2006-02-04 08:10:01 +00:00
|
|
|
sethi %hi(KERNBASE), %g1
|
|
|
|
flush %g1
|
|
|
|
|
|
|
|
or %g4, FAULT_CODE_WINFIXUP, %g4
|
|
|
|
stb %g4, [%g6 + TI_FAULT_CODE]
|
|
|
|
stx %g5, [%g6 + TI_FAULT_ADDR]
|
|
|
|
|
|
|
|
mov %g6, %l1
|
|
|
|
wrpr %g0, 0x0, %tl
|
2006-02-06 05:29:28 +00:00
|
|
|
|
|
|
|
661: nop
|
2006-02-07 08:00:16 +00:00
|
|
|
.section .sun4v_1insn_patch, "ax"
|
2006-02-06 05:29:28 +00:00
|
|
|
.word 661b
|
|
|
|
SET_GL(0)
|
|
|
|
.previous
|
|
|
|
|
2006-02-23 00:15:45 +00:00
|
|
|
wrpr %g0, RTRAP_PSTATE, %pstate
|
|
|
|
|
2006-02-04 08:10:01 +00:00
|
|
|
mov %l1, %g6
|
|
|
|
ldx [%g6 + TI_TASK], %g4
|
|
|
|
LOAD_PER_CPU_BASE(%g5, %g6, %g1, %g2, %g3)
|
|
|
|
call do_sparc64_fault
|
|
|
|
add %sp, PTREGS_OFF, %o0
|
|
|
|
ba,pt %xcc, rtrap
|
|
|
|
nop
|
|
|
|
|
|
|
|
user_rtt_pre_restore:
|
|
|
|
add %g1, 1, %g1
|
|
|
|
wrpr %g1, 0x0, %cwp
|
|
|
|
|
|
|
|
user_rtt_restore:
|
2005-04-16 22:20:36 +00:00
|
|
|
restore
|
|
|
|
rdpr %canrestore, %g1
|
|
|
|
wrpr %g1, 0x0, %cleanwin
|
|
|
|
retry
|
|
|
|
nop
|
|
|
|
|
2006-02-04 08:10:01 +00:00
|
|
|
kern_rtt: rdpr %canrestore, %g1
|
|
|
|
brz,pn %g1, kern_rtt_fill
|
|
|
|
nop
|
|
|
|
kern_rtt_restore:
|
2008-05-22 04:50:01 +00:00
|
|
|
stw %g0, [%sp + PTREGS_OFF + PT_V9_MAGIC]
|
2006-02-04 08:10:01 +00:00
|
|
|
restore
|
2005-04-16 22:20:36 +00:00
|
|
|
retry
|
2006-02-04 08:10:01 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
to_kernel:
|
|
|
|
#ifdef CONFIG_PREEMPT
|
|
|
|
ldsw [%g6 + TI_PRE_COUNT], %l5
|
|
|
|
brnz %l5, kern_fpucheck
|
|
|
|
ldx [%g6 + TI_FLAGS], %l5
|
|
|
|
andcc %l5, _TIF_NEED_RESCHED, %g0
|
|
|
|
be,pt %xcc, kern_fpucheck
|
2006-11-16 21:38:57 +00:00
|
|
|
nop
|
|
|
|
cmp %l4, 0
|
2005-04-16 22:20:36 +00:00
|
|
|
bne,pn %xcc, kern_fpucheck
|
|
|
|
sethi %hi(PREEMPT_ACTIVE), %l6
|
|
|
|
stw %l6, [%g6 + TI_PRE_COUNT]
|
|
|
|
call schedule
|
|
|
|
nop
|
|
|
|
ba,pt %xcc, rtrap
|
|
|
|
stw %g0, [%g6 + TI_PRE_COUNT]
|
|
|
|
#endif
|
|
|
|
kern_fpucheck: ldub [%g6 + TI_FPDEPTH], %l5
|
|
|
|
brz,pt %l5, rt_continue
|
|
|
|
srl %l5, 1, %o0
|
|
|
|
add %g6, TI_FPSAVED, %l6
|
|
|
|
ldub [%l6 + %o0], %l2
|
|
|
|
sub %l5, 2, %l5
|
|
|
|
|
|
|
|
add %g6, TI_GSR, %o1
|
|
|
|
andcc %l2, (FPRS_FEF|FPRS_DU), %g0
|
|
|
|
be,pt %icc, 2f
|
|
|
|
and %l2, FPRS_DL, %l6
|
|
|
|
andcc %l2, FPRS_FEF, %g0
|
|
|
|
be,pn %icc, 5f
|
|
|
|
sll %o0, 3, %o5
|
|
|
|
rd %fprs, %g1
|
|
|
|
|
|
|
|
wr %g1, FPRS_FEF, %fprs
|
|
|
|
ldx [%o1 + %o5], %g1
|
|
|
|
add %g6, TI_XFSR, %o1
|
|
|
|
sll %o0, 8, %o2
|
|
|
|
add %g6, TI_FPREGS, %o3
|
|
|
|
brz,pn %l6, 1f
|
|
|
|
add %g6, TI_FPREGS+0x40, %o4
|
|
|
|
|
2005-10-07 20:30:49 +00:00
|
|
|
membar #Sync
|
2005-04-16 22:20:36 +00:00
|
|
|
ldda [%o3 + %o2] ASI_BLK_P, %f0
|
|
|
|
ldda [%o4 + %o2] ASI_BLK_P, %f16
|
2005-10-07 20:30:49 +00:00
|
|
|
membar #Sync
|
2005-04-16 22:20:36 +00:00
|
|
|
1: andcc %l2, FPRS_DU, %g0
|
|
|
|
be,pn %icc, 1f
|
|
|
|
wr %g1, 0, %gsr
|
|
|
|
add %o2, 0x80, %o2
|
2005-10-07 20:30:49 +00:00
|
|
|
membar #Sync
|
2005-04-16 22:20:36 +00:00
|
|
|
ldda [%o3 + %o2] ASI_BLK_P, %f32
|
|
|
|
ldda [%o4 + %o2] ASI_BLK_P, %f48
|
|
|
|
1: membar #Sync
|
|
|
|
ldx [%o1 + %o5], %fsr
|
|
|
|
2: stb %l5, [%g6 + TI_FPDEPTH]
|
|
|
|
ba,pt %xcc, rt_continue
|
|
|
|
nop
|
|
|
|
5: wr %g0, FPRS_FEF, %fprs
|
|
|
|
sll %o0, 8, %o2
|
|
|
|
|
|
|
|
add %g6, TI_FPREGS+0x80, %o3
|
|
|
|
add %g6, TI_FPREGS+0xc0, %o4
|
2005-10-07 20:30:49 +00:00
|
|
|
membar #Sync
|
2005-04-16 22:20:36 +00:00
|
|
|
ldda [%o3 + %o2] ASI_BLK_P, %f32
|
|
|
|
ldda [%o4 + %o2] ASI_BLK_P, %f48
|
|
|
|
membar #Sync
|
|
|
|
wr %g0, FPRS_DU, %fprs
|
|
|
|
ba,pt %xcc, rt_continue
|
|
|
|
stb %l5, [%g6 + TI_FPDEPTH]
|