2016-08-11 22:28:03 +00:00
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/*
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* Broadcom Northstar USB 3.0 PHY Driver
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*
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* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
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2017-04-02 16:55:22 +00:00
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* Copyright (C) 2016 Broadcom
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2016-08-11 22:28:03 +00:00
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*
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* All magic values used for initialization (and related comments) were obtained
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* from Broadcom's SDK:
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* Copyright (c) Broadcom Corp, 2012
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/bcma/bcma.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/phy/phy.h>
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#include <linux/slab.h>
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#define BCM_NS_USB3_MII_MNG_TIMEOUT_US 1000 /* usecs */
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2017-04-02 16:55:22 +00:00
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#define BCM_NS_USB3_PHY_BASE_ADDR_REG 0x1f
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#define BCM_NS_USB3_PHY_PLL30_BLOCK 0x8000
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#define BCM_NS_USB3_PHY_TX_PMD_BLOCK 0x8040
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#define BCM_NS_USB3_PHY_PIPE_BLOCK 0x8060
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/* Registers of PLL30 block */
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#define BCM_NS_USB3_PLL_CONTROL 0x01
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#define BCM_NS_USB3_PLLA_CONTROL0 0x0a
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#define BCM_NS_USB3_PLLA_CONTROL1 0x0b
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/* Registers of TX PMD block */
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#define BCM_NS_USB3_TX_PMD_CONTROL1 0x01
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/* Registers of PIPE block */
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#define BCM_NS_USB3_LFPS_CMP 0x02
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#define BCM_NS_USB3_LFPS_DEGLITCH 0x03
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2016-08-11 22:28:03 +00:00
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enum bcm_ns_family {
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BCM_NS_UNKNOWN,
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BCM_NS_AX,
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BCM_NS_BX,
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};
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struct bcm_ns_usb3 {
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struct device *dev;
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enum bcm_ns_family family;
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void __iomem *dmp;
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void __iomem *ccb_mii;
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struct phy *phy;
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};
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static const struct of_device_id bcm_ns_usb3_id_table[] = {
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{
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.compatible = "brcm,ns-ax-usb3-phy",
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.data = (int *)BCM_NS_AX,
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},
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{
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.compatible = "brcm,ns-bx-usb3-phy",
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.data = (int *)BCM_NS_BX,
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, bcm_ns_usb3_id_table);
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static int bcm_ns_usb3_wait_reg(struct bcm_ns_usb3 *usb3, void __iomem *addr,
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u32 mask, u32 value, unsigned long timeout)
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{
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unsigned long deadline = jiffies + timeout;
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u32 val;
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do {
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val = readl(addr);
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if ((val & mask) == value)
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return 0;
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cpu_relax();
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udelay(10);
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} while (!time_after_eq(jiffies, deadline));
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dev_err(usb3->dev, "Timeout waiting for register %p\n", addr);
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return -EBUSY;
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}
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static inline int bcm_ns_usb3_mii_mng_wait_idle(struct bcm_ns_usb3 *usb3)
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{
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return bcm_ns_usb3_wait_reg(usb3, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL,
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0x0100, 0x0000,
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usecs_to_jiffies(BCM_NS_USB3_MII_MNG_TIMEOUT_US));
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}
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2017-04-02 16:55:22 +00:00
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static int bcm_ns_usb3_mdio_phy_write(struct bcm_ns_usb3 *usb3, u16 reg,
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u16 value)
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2016-08-11 22:28:03 +00:00
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{
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2017-04-02 16:55:22 +00:00
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u32 tmp = 0;
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2016-08-11 22:28:03 +00:00
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int err;
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err = bcm_ns_usb3_mii_mng_wait_idle(usb3);
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if (err < 0) {
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dev_err(usb3->dev, "Couldn't write 0x%08x value\n", value);
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return err;
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}
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2017-04-02 16:55:22 +00:00
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/* TODO: Use a proper MDIO bus layer */
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tmp |= 0x58020000; /* Magic value for MDIO PHY write */
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tmp |= reg << 18;
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tmp |= value;
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writel(tmp, usb3->ccb_mii + BCMA_CCB_MII_MNG_CMD_DATA);
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2016-08-11 22:28:03 +00:00
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return 0;
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}
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static int bcm_ns_usb3_phy_init_ns_bx(struct bcm_ns_usb3 *usb3)
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{
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int err;
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/* Enable MDIO. Setting MDCDIV as 26 */
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writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL);
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/* Wait for MDIO? */
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udelay(2);
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/* USB3 PLL Block */
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2017-04-02 16:55:22 +00:00
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err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
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BCM_NS_USB3_PHY_PLL30_BLOCK);
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2016-08-11 22:28:03 +00:00
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if (err < 0)
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return err;
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/* Assert Ana_Pllseq start */
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLL_CONTROL, 0x1000);
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2016-08-11 22:28:03 +00:00
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/* Assert CML Divider ratio to 26 */
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL0, 0x6400);
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2016-08-11 22:28:03 +00:00
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/* Asserting PLL Reset */
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL1, 0xc000);
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2016-08-11 22:28:03 +00:00
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/* Deaaserting PLL Reset */
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL1, 0x8000);
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2016-08-11 22:28:03 +00:00
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/* Waiting MII Mgt interface idle */
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bcm_ns_usb3_mii_mng_wait_idle(usb3);
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/* Deasserting USB3 system reset */
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writel(0, usb3->dmp + BCMA_RESET_CTL);
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/* PLL frequency monitor enable */
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLL_CONTROL, 0x9000);
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2016-08-11 22:28:03 +00:00
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/* PIPE Block */
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
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BCM_NS_USB3_PHY_PIPE_BLOCK);
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2016-08-11 22:28:03 +00:00
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/* CMPMAX & CMPMINTH setting */
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_LFPS_CMP, 0xf30d);
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2016-08-11 22:28:03 +00:00
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/* DEGLITCH MIN & MAX setting */
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_LFPS_DEGLITCH, 0x6302);
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2016-08-11 22:28:03 +00:00
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/* TXPMD block */
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
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BCM_NS_USB3_PHY_TX_PMD_BLOCK);
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2016-08-11 22:28:03 +00:00
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/* Enabling SSC */
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_TX_PMD_CONTROL1, 0x1003);
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2016-08-11 22:28:03 +00:00
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/* Waiting MII Mgt interface idle */
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bcm_ns_usb3_mii_mng_wait_idle(usb3);
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return 0;
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}
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static int bcm_ns_usb3_phy_init_ns_ax(struct bcm_ns_usb3 *usb3)
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{
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int err;
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/* Enable MDIO. Setting MDCDIV as 26 */
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writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL);
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/* Wait for MDIO? */
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udelay(2);
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/* PLL30 block */
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2017-04-02 16:55:22 +00:00
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err = bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
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BCM_NS_USB3_PHY_PLL30_BLOCK);
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2016-08-11 22:28:03 +00:00
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if (err < 0)
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return err;
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PLLA_CONTROL0, 0x6400);
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2016-08-11 22:28:03 +00:00
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG, 0x80e0);
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2016-08-11 22:28:03 +00:00
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, 0x02, 0x009c);
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2016-08-11 22:28:03 +00:00
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/* Enable SSC */
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_PHY_BASE_ADDR_REG,
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BCM_NS_USB3_PHY_TX_PMD_BLOCK);
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2016-08-11 22:28:03 +00:00
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, 0x02, 0x21d3);
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2016-08-11 22:28:03 +00:00
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2017-04-02 16:55:22 +00:00
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bcm_ns_usb3_mdio_phy_write(usb3, BCM_NS_USB3_TX_PMD_CONTROL1, 0x1003);
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2016-08-11 22:28:03 +00:00
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/* Waiting MII Mgt interface idle */
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bcm_ns_usb3_mii_mng_wait_idle(usb3);
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/* Deasserting USB3 system reset */
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writel(0, usb3->dmp + BCMA_RESET_CTL);
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return 0;
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}
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static int bcm_ns_usb3_phy_init(struct phy *phy)
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{
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struct bcm_ns_usb3 *usb3 = phy_get_drvdata(phy);
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int err;
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/* Perform USB3 system soft reset */
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writel(BCMA_RESET_CTL_RESET, usb3->dmp + BCMA_RESET_CTL);
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switch (usb3->family) {
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case BCM_NS_AX:
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err = bcm_ns_usb3_phy_init_ns_ax(usb3);
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break;
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case BCM_NS_BX:
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err = bcm_ns_usb3_phy_init_ns_bx(usb3);
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break;
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default:
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WARN_ON(1);
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err = -ENOTSUPP;
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}
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return err;
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}
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static const struct phy_ops ops = {
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.init = bcm_ns_usb3_phy_init,
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.owner = THIS_MODULE,
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};
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static int bcm_ns_usb3_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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const struct of_device_id *of_id;
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struct bcm_ns_usb3 *usb3;
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struct resource *res;
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struct phy_provider *phy_provider;
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usb3 = devm_kzalloc(dev, sizeof(*usb3), GFP_KERNEL);
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if (!usb3)
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return -ENOMEM;
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usb3->dev = dev;
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of_id = of_match_device(bcm_ns_usb3_id_table, dev);
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if (!of_id)
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return -EINVAL;
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usb3->family = (enum bcm_ns_family)of_id->data;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmp");
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usb3->dmp = devm_ioremap_resource(dev, res);
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if (IS_ERR(usb3->dmp)) {
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dev_err(dev, "Failed to map DMP regs\n");
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return PTR_ERR(usb3->dmp);
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}
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ccb-mii");
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usb3->ccb_mii = devm_ioremap_resource(dev, res);
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if (IS_ERR(usb3->ccb_mii)) {
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dev_err(dev, "Failed to map ChipCommon B MII regs\n");
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return PTR_ERR(usb3->ccb_mii);
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}
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usb3->phy = devm_phy_create(dev, NULL, &ops);
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if (IS_ERR(usb3->phy)) {
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dev_err(dev, "Failed to create PHY\n");
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return PTR_ERR(usb3->phy);
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}
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phy_set_drvdata(usb3->phy, usb3);
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platform_set_drvdata(pdev, usb3);
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phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
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if (!IS_ERR(phy_provider))
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dev_info(dev, "Registered Broadcom Northstar USB 3.0 PHY driver\n");
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return PTR_ERR_OR_ZERO(phy_provider);
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}
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static struct platform_driver bcm_ns_usb3_driver = {
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.probe = bcm_ns_usb3_probe,
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.driver = {
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.name = "bcm_ns_usb3",
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.of_match_table = bcm_ns_usb3_id_table,
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},
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};
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module_platform_driver(bcm_ns_usb3_driver);
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MODULE_LICENSE("GPL v2");
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