2008-07-09 14:27:56 +00:00
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/*
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* Au12x0/Au1550 PSC ALSA ASoC audio support.
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*
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2009-09-08 17:45:17 +00:00
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* (c) 2007-2009 MSC Vertriebsges.m.b.H.,
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* Manuel Lauss <manuel.lauss@gmail.com>
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2008-07-09 14:27:56 +00:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Au1xxx-PSC AC97 glue.
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*
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
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#include <linux/slab.h>
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2008-07-09 14:27:56 +00:00
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#include <linux/device.h>
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#include <linux/delay.h>
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2009-09-08 17:45:17 +00:00
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#include <linux/mutex.h>
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2008-07-09 14:27:56 +00:00
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#include <linux/suspend.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/au1xxx_psc.h>
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#include "psc.h"
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2009-09-08 17:45:17 +00:00
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/* how often to retry failed codec register reads/writes */
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#define AC97_RW_RETRIES 5
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2008-07-09 14:27:56 +00:00
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#define AC97_DIR \
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(SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
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#define AC97_RATES \
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SNDRV_PCM_RATE_8000_48000
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#define AC97_FMTS \
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(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3BE)
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#define AC97PCR_START(stype) \
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2011-07-25 11:45:04 +00:00
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((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TS : PSC_AC97PCR_RS)
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2008-07-09 14:27:56 +00:00
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#define AC97PCR_STOP(stype) \
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2011-07-25 11:45:04 +00:00
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((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TP : PSC_AC97PCR_RP)
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2008-07-09 14:27:56 +00:00
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#define AC97PCR_CLRFIFO(stype) \
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2011-07-25 11:45:04 +00:00
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((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97PCR_TC : PSC_AC97PCR_RC)
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2008-07-09 14:27:56 +00:00
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2009-09-08 17:45:17 +00:00
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#define AC97STAT_BUSY(stype) \
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2011-07-25 11:45:04 +00:00
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((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_AC97STAT_TB : PSC_AC97STAT_RB)
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2009-09-08 17:45:17 +00:00
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2008-07-09 14:27:56 +00:00
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/* instance data. There can be only one, MacLeod!!!! */
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static struct au1xpsc_audio_data *au1xpsc_ac97_workdata;
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2010-08-26 12:53:51 +00:00
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#if 0
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/* this could theoretically work, but ac97->bus->card->private_data can be NULL
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* when snd_ac97_mixer() is called; I don't know if the rest further down the
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* chain are always valid either.
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*/
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static inline struct au1xpsc_audio_data *ac97_to_pscdata(struct snd_ac97 *x)
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{
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struct snd_soc_card *c = x->bus->card->private_data;
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return snd_soc_dai_get_drvdata(c->rtd->cpu_dai);
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}
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#else
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#define ac97_to_pscdata(x) au1xpsc_ac97_workdata
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#endif
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2008-07-09 14:27:56 +00:00
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/* AC97 controller reads codec register */
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static unsigned short au1xpsc_ac97_read(struct snd_ac97 *ac97,
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unsigned short reg)
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{
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2010-08-26 12:53:51 +00:00
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struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97);
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2009-10-19 14:10:58 +00:00
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unsigned short retry, tmo;
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unsigned long data;
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2008-07-09 14:27:56 +00:00
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2014-07-23 14:36:26 +00:00
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__raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
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wmb(); /* drain writebuffer */
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2008-07-09 14:27:56 +00:00
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2009-09-08 17:45:17 +00:00
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retry = AC97_RW_RETRIES;
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do {
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mutex_lock(&pscdata->lock);
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2014-07-23 14:36:26 +00:00
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__raw_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg),
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2009-09-08 17:45:17 +00:00
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AC97_CDC(pscdata));
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2014-07-23 14:36:26 +00:00
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wmb(); /* drain writebuffer */
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2009-09-08 17:45:17 +00:00
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2009-10-19 14:10:59 +00:00
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tmo = 20;
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do {
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udelay(21);
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2014-07-23 14:36:26 +00:00
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if (__raw_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
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2009-10-19 14:10:59 +00:00
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break;
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} while (--tmo);
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2008-07-09 14:27:56 +00:00
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2014-07-23 14:36:26 +00:00
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data = __raw_readl(AC97_CDC(pscdata));
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2008-07-09 14:27:56 +00:00
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2014-07-23 14:36:26 +00:00
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__raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
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wmb(); /* drain writebuffer */
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2009-09-08 17:45:17 +00:00
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mutex_unlock(&pscdata->lock);
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2009-10-19 14:10:58 +00:00
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if (reg != ((data >> 16) & 0x7f))
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tmo = 1; /* wrong register, try again */
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2009-09-08 17:45:17 +00:00
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} while (--retry && !tmo);
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2008-07-09 14:27:56 +00:00
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2009-10-19 14:10:58 +00:00
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return retry ? data & 0xffff : 0xffff;
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2008-07-09 14:27:56 +00:00
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}
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/* AC97 controller writes to codec register */
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static void au1xpsc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
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unsigned short val)
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{
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2010-08-26 12:53:51 +00:00
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struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97);
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2009-09-08 17:45:17 +00:00
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unsigned int tmo, retry;
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2008-07-09 14:27:56 +00:00
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2014-07-23 14:36:26 +00:00
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__raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
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wmb(); /* drain writebuffer */
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2009-09-08 17:45:17 +00:00
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retry = AC97_RW_RETRIES;
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do {
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mutex_lock(&pscdata->lock);
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2014-07-23 14:36:26 +00:00
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__raw_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff),
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2009-09-08 17:45:17 +00:00
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AC97_CDC(pscdata));
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2014-07-23 14:36:26 +00:00
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wmb(); /* drain writebuffer */
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2008-07-09 14:27:56 +00:00
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2009-10-19 14:10:59 +00:00
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tmo = 20;
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do {
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udelay(21);
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2014-07-23 14:36:26 +00:00
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if (__raw_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
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2009-10-19 14:10:59 +00:00
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break;
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} while (--tmo);
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2009-09-08 17:45:17 +00:00
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2014-07-23 14:36:26 +00:00
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__raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
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wmb(); /* drain writebuffer */
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2009-09-08 17:45:17 +00:00
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mutex_unlock(&pscdata->lock);
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} while (--retry && !tmo);
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2008-07-09 14:27:56 +00:00
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}
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/* AC97 controller asserts a warm reset */
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static void au1xpsc_ac97_warm_reset(struct snd_ac97 *ac97)
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{
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2010-08-26 12:53:51 +00:00
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struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97);
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2008-07-09 14:27:56 +00:00
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2014-07-23 14:36:26 +00:00
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__raw_writel(PSC_AC97RST_SNC, AC97_RST(pscdata));
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wmb(); /* drain writebuffer */
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2008-07-09 14:27:56 +00:00
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msleep(10);
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2014-07-23 14:36:26 +00:00
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__raw_writel(0, AC97_RST(pscdata));
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wmb(); /* drain writebuffer */
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2008-07-09 14:27:56 +00:00
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}
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static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97)
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{
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2010-08-26 12:53:51 +00:00
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struct au1xpsc_audio_data *pscdata = ac97_to_pscdata(ac97);
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2008-07-09 14:27:56 +00:00
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int i;
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/* disable PSC during cold reset */
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2014-07-23 14:36:26 +00:00
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__raw_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
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wmb(); /* drain writebuffer */
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__raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata));
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wmb(); /* drain writebuffer */
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2008-07-09 14:27:56 +00:00
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/* issue cold reset */
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2014-07-23 14:36:26 +00:00
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__raw_writel(PSC_AC97RST_RST, AC97_RST(pscdata));
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wmb(); /* drain writebuffer */
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2008-07-09 14:27:56 +00:00
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msleep(500);
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2014-07-23 14:36:26 +00:00
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__raw_writel(0, AC97_RST(pscdata));
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wmb(); /* drain writebuffer */
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2008-07-09 14:27:56 +00:00
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/* enable PSC */
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2014-07-23 14:36:26 +00:00
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__raw_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
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wmb(); /* drain writebuffer */
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2008-07-09 14:27:56 +00:00
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/* wait for PSC to indicate it's ready */
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2009-09-08 17:45:17 +00:00
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i = 1000;
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2014-07-23 14:36:26 +00:00
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while (!((__raw_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i))
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2009-09-08 17:45:17 +00:00
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msleep(1);
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2008-07-09 14:27:56 +00:00
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if (i == 0) {
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printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n");
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return;
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}
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/* enable the ac97 function */
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2014-07-23 14:36:26 +00:00
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__raw_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
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wmb(); /* drain writebuffer */
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2008-07-09 14:27:56 +00:00
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/* wait for AC97 core to become ready */
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2009-09-08 17:45:17 +00:00
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i = 1000;
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2014-07-23 14:36:26 +00:00
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while (!((__raw_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i))
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2009-09-08 17:45:17 +00:00
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msleep(1);
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2008-07-09 14:27:56 +00:00
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if (i == 0)
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printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n");
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}
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/* AC97 controller operations */
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2013-06-26 11:45:59 +00:00
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static struct snd_ac97_bus_ops psc_ac97_ops = {
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2008-07-09 14:27:56 +00:00
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.read = au1xpsc_ac97_read,
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.write = au1xpsc_ac97_write,
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.reset = au1xpsc_ac97_cold_reset,
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.warm_reset = au1xpsc_ac97_warm_reset,
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};
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static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream,
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2008-11-18 22:11:38 +00:00
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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2008-07-09 14:27:56 +00:00
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{
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2010-08-26 12:53:51 +00:00
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struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
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2009-09-08 17:45:17 +00:00
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unsigned long r, ro, stat;
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2011-07-25 11:45:04 +00:00
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int chans, t, stype = substream->stream;
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2008-07-09 14:27:56 +00:00
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chans = params_channels(params);
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2014-07-23 14:36:26 +00:00
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r = ro = __raw_readl(AC97_CFG(pscdata));
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stat = __raw_readl(AC97_STAT(pscdata));
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2008-07-09 14:27:56 +00:00
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/* already active? */
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if (stat & (PSC_AC97STAT_TB | PSC_AC97STAT_RB)) {
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/* reject parameters not currently set up */
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if ((PSC_AC97CFG_GET_LEN(r) != params->msbits) ||
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(pscdata->rate != params_rate(params)))
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return -EINVAL;
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} else {
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/* set sample bitdepth: REG[24:21]=(BITS-2)/2 */
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r &= ~PSC_AC97CFG_LEN_MASK;
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r |= PSC_AC97CFG_SET_LEN(params->msbits);
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/* channels: enable slots for front L/R channel */
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2011-07-25 11:45:04 +00:00
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if (stype == SNDRV_PCM_STREAM_PLAYBACK) {
|
2008-07-09 14:27:56 +00:00
|
|
|
r &= ~PSC_AC97CFG_TXSLOT_MASK;
|
|
|
|
r |= PSC_AC97CFG_TXSLOT_ENA(3);
|
|
|
|
r |= PSC_AC97CFG_TXSLOT_ENA(4);
|
|
|
|
} else {
|
|
|
|
r &= ~PSC_AC97CFG_RXSLOT_MASK;
|
|
|
|
r |= PSC_AC97CFG_RXSLOT_ENA(3);
|
|
|
|
r |= PSC_AC97CFG_RXSLOT_ENA(4);
|
|
|
|
}
|
|
|
|
|
2009-09-08 17:45:17 +00:00
|
|
|
/* do we need to poke the hardware? */
|
|
|
|
if (!(r ^ ro))
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
/* ac97 engine is about to be disabled */
|
|
|
|
mutex_lock(&pscdata->lock);
|
|
|
|
|
|
|
|
/* disable AC97 device controller first... */
|
2014-07-23 14:36:26 +00:00
|
|
|
__raw_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
|
|
|
|
wmb(); /* drain writebuffer */
|
2009-09-08 17:45:17 +00:00
|
|
|
|
|
|
|
/* ...wait for it... */
|
2009-10-19 14:10:59 +00:00
|
|
|
t = 100;
|
2014-07-23 14:36:26 +00:00
|
|
|
while ((__raw_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR) && --t)
|
2009-10-19 14:10:59 +00:00
|
|
|
msleep(1);
|
|
|
|
|
|
|
|
if (!t)
|
|
|
|
printk(KERN_ERR "PSC-AC97: can't disable!\n");
|
2009-09-08 17:45:17 +00:00
|
|
|
|
|
|
|
/* ...write config... */
|
2014-07-23 14:36:26 +00:00
|
|
|
__raw_writel(r, AC97_CFG(pscdata));
|
|
|
|
wmb(); /* drain writebuffer */
|
2009-09-08 17:45:17 +00:00
|
|
|
|
|
|
|
/* ...enable the AC97 controller again... */
|
2014-07-23 14:36:26 +00:00
|
|
|
__raw_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
|
|
|
|
wmb(); /* drain writebuffer */
|
2008-07-09 14:27:56 +00:00
|
|
|
|
2009-09-08 17:45:17 +00:00
|
|
|
/* ...and wait for ready bit */
|
2009-10-19 14:10:59 +00:00
|
|
|
t = 100;
|
2014-07-23 14:36:26 +00:00
|
|
|
while ((!(__raw_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && --t)
|
2009-10-19 14:10:59 +00:00
|
|
|
msleep(1);
|
|
|
|
|
|
|
|
if (!t)
|
|
|
|
printk(KERN_ERR "PSC-AC97: can't enable!\n");
|
2009-09-08 17:45:17 +00:00
|
|
|
|
|
|
|
mutex_unlock(&pscdata->lock);
|
|
|
|
|
2008-07-09 14:27:56 +00:00
|
|
|
pscdata->cfg = r;
|
|
|
|
pscdata->rate = params_rate(params);
|
|
|
|
}
|
|
|
|
|
2009-09-08 17:45:17 +00:00
|
|
|
out:
|
2008-07-09 14:27:56 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int au1xpsc_ac97_trigger(struct snd_pcm_substream *substream,
|
2008-11-18 22:11:38 +00:00
|
|
|
int cmd, struct snd_soc_dai *dai)
|
2008-07-09 14:27:56 +00:00
|
|
|
{
|
2010-08-26 12:53:51 +00:00
|
|
|
struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
|
2011-07-25 11:45:04 +00:00
|
|
|
int ret, stype = substream->stream;
|
2008-07-09 14:27:56 +00:00
|
|
|
|
|
|
|
ret = 0;
|
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case SNDRV_PCM_TRIGGER_START:
|
|
|
|
case SNDRV_PCM_TRIGGER_RESUME:
|
2014-07-23 14:36:26 +00:00
|
|
|
__raw_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
|
|
|
|
wmb(); /* drain writebuffer */
|
|
|
|
__raw_writel(AC97PCR_START(stype), AC97_PCR(pscdata));
|
|
|
|
wmb(); /* drain writebuffer */
|
2008-07-09 14:27:56 +00:00
|
|
|
break;
|
|
|
|
case SNDRV_PCM_TRIGGER_STOP:
|
|
|
|
case SNDRV_PCM_TRIGGER_SUSPEND:
|
2014-07-23 14:36:26 +00:00
|
|
|
__raw_writel(AC97PCR_STOP(stype), AC97_PCR(pscdata));
|
|
|
|
wmb(); /* drain writebuffer */
|
2009-09-08 17:45:17 +00:00
|
|
|
|
2014-07-23 14:36:26 +00:00
|
|
|
while (__raw_readl(AC97_STAT(pscdata)) & AC97STAT_BUSY(stype))
|
2009-09-08 17:45:17 +00:00
|
|
|
asm volatile ("nop");
|
|
|
|
|
2014-07-23 14:36:26 +00:00
|
|
|
__raw_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
|
|
|
|
wmb(); /* drain writebuffer */
|
2009-09-08 17:45:17 +00:00
|
|
|
|
2008-07-09 14:27:56 +00:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2011-07-25 11:45:02 +00:00
|
|
|
static int au1xpsc_ac97_startup(struct snd_pcm_substream *substream,
|
|
|
|
struct snd_soc_dai *dai)
|
|
|
|
{
|
|
|
|
struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
|
|
|
|
snd_soc_dai_set_dma_data(dai, substream, &pscdata->dmaids[0]);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-03-17 20:15:21 +00:00
|
|
|
static int au1xpsc_ac97_probe(struct snd_soc_dai *dai)
|
2009-10-31 19:15:08 +00:00
|
|
|
{
|
|
|
|
return au1xpsc_ac97_workdata ? 0 : -ENODEV;
|
|
|
|
}
|
|
|
|
|
2011-11-23 10:40:40 +00:00
|
|
|
static const struct snd_soc_dai_ops au1xpsc_ac97_dai_ops = {
|
2011-07-25 11:45:02 +00:00
|
|
|
.startup = au1xpsc_ac97_startup,
|
2009-10-31 19:15:08 +00:00
|
|
|
.trigger = au1xpsc_ac97_trigger,
|
|
|
|
.hw_params = au1xpsc_ac97_hw_params,
|
|
|
|
};
|
|
|
|
|
2010-08-26 12:53:51 +00:00
|
|
|
static const struct snd_soc_dai_driver au1xpsc_ac97_dai_template = {
|
2009-10-31 19:15:08 +00:00
|
|
|
.ac97_control = 1,
|
|
|
|
.probe = au1xpsc_ac97_probe,
|
|
|
|
.playback = {
|
|
|
|
.rates = AC97_RATES,
|
|
|
|
.formats = AC97_FMTS,
|
|
|
|
.channels_min = 2,
|
|
|
|
.channels_max = 2,
|
|
|
|
},
|
|
|
|
.capture = {
|
|
|
|
.rates = AC97_RATES,
|
|
|
|
.formats = AC97_FMTS,
|
|
|
|
.channels_min = 2,
|
|
|
|
.channels_max = 2,
|
|
|
|
},
|
|
|
|
.ops = &au1xpsc_ac97_dai_ops,
|
|
|
|
};
|
|
|
|
|
2013-03-21 10:28:50 +00:00
|
|
|
static const struct snd_soc_component_driver au1xpsc_ac97_component = {
|
|
|
|
.name = "au1xpsc-ac97",
|
|
|
|
};
|
|
|
|
|
2012-12-07 14:26:22 +00:00
|
|
|
static int au1xpsc_ac97_drvprobe(struct platform_device *pdev)
|
2008-07-09 14:27:56 +00:00
|
|
|
{
|
|
|
|
int ret;
|
2011-10-18 15:06:39 +00:00
|
|
|
struct resource *iores, *dmares;
|
2008-07-09 14:27:56 +00:00
|
|
|
unsigned long sel;
|
2009-10-31 19:15:08 +00:00
|
|
|
struct au1xpsc_audio_data *wd;
|
2008-07-09 14:27:56 +00:00
|
|
|
|
2011-12-29 16:51:25 +00:00
|
|
|
wd = devm_kzalloc(&pdev->dev, sizeof(struct au1xpsc_audio_data),
|
|
|
|
GFP_KERNEL);
|
2009-10-31 19:15:08 +00:00
|
|
|
if (!wd)
|
2008-07-09 14:27:56 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
|
2009-10-31 19:15:08 +00:00
|
|
|
mutex_init(&wd->lock);
|
2009-09-08 17:45:17 +00:00
|
|
|
|
2011-10-18 15:06:39 +00:00
|
|
|
iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
2013-06-26 10:09:55 +00:00
|
|
|
wd->mmio = devm_ioremap_resource(&pdev->dev, iores);
|
|
|
|
if (IS_ERR(wd->mmio))
|
|
|
|
return PTR_ERR(wd->mmio);
|
2008-07-09 14:27:56 +00:00
|
|
|
|
2011-10-18 15:06:39 +00:00
|
|
|
dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
|
|
|
|
if (!dmares)
|
2011-12-29 16:51:25 +00:00
|
|
|
return -EBUSY;
|
2011-10-18 15:06:39 +00:00
|
|
|
wd->dmaids[SNDRV_PCM_STREAM_PLAYBACK] = dmares->start;
|
2011-07-25 11:45:02 +00:00
|
|
|
|
2011-10-18 15:06:39 +00:00
|
|
|
dmares = platform_get_resource(pdev, IORESOURCE_DMA, 1);
|
|
|
|
if (!dmares)
|
2011-12-29 16:51:25 +00:00
|
|
|
return -EBUSY;
|
2011-10-18 15:06:39 +00:00
|
|
|
wd->dmaids[SNDRV_PCM_STREAM_CAPTURE] = dmares->start;
|
2011-07-25 11:45:02 +00:00
|
|
|
|
2008-07-09 14:27:56 +00:00
|
|
|
/* configuration: max dma trigger threshold, enable ac97 */
|
2009-10-31 19:15:08 +00:00
|
|
|
wd->cfg = PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8 |
|
|
|
|
PSC_AC97CFG_DE_ENABLE;
|
2008-07-09 14:27:56 +00:00
|
|
|
|
2009-10-31 19:15:08 +00:00
|
|
|
/* preserve PSC clock source set up by platform */
|
2014-07-23 14:36:26 +00:00
|
|
|
sel = __raw_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
|
|
|
|
__raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
|
|
|
|
wmb(); /* drain writebuffer */
|
|
|
|
__raw_writel(0, PSC_SEL(wd));
|
|
|
|
wmb(); /* drain writebuffer */
|
|
|
|
__raw_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(wd));
|
|
|
|
wmb(); /* drain writebuffer */
|
2008-07-09 14:27:56 +00:00
|
|
|
|
2010-08-26 12:53:51 +00:00
|
|
|
/* name the DAI like this device instance ("au1xpsc-ac97.PSCINDEX") */
|
|
|
|
memcpy(&wd->dai_drv, &au1xpsc_ac97_dai_template,
|
|
|
|
sizeof(struct snd_soc_dai_driver));
|
|
|
|
wd->dai_drv.name = dev_name(&pdev->dev);
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, wd);
|
|
|
|
|
2013-06-26 11:45:59 +00:00
|
|
|
ret = snd_soc_set_ac97_ops(&psc_ac97_ops);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2013-03-21 10:28:50 +00:00
|
|
|
ret = snd_soc_register_component(&pdev->dev, &au1xpsc_ac97_component,
|
|
|
|
&wd->dai_drv, 1);
|
2009-10-31 19:15:08 +00:00
|
|
|
if (ret)
|
2011-12-29 16:51:25 +00:00
|
|
|
return ret;
|
2009-10-31 19:15:08 +00:00
|
|
|
|
2011-07-25 11:45:02 +00:00
|
|
|
au1xpsc_ac97_workdata = wd;
|
|
|
|
return 0;
|
2008-07-09 14:27:56 +00:00
|
|
|
}
|
|
|
|
|
2012-12-07 14:26:22 +00:00
|
|
|
static int au1xpsc_ac97_drvremove(struct platform_device *pdev)
|
2008-07-09 14:27:56 +00:00
|
|
|
{
|
2009-10-31 19:15:08 +00:00
|
|
|
struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev);
|
|
|
|
|
2013-03-21 10:28:50 +00:00
|
|
|
snd_soc_unregister_component(&pdev->dev);
|
2009-10-31 19:15:08 +00:00
|
|
|
|
2008-07-09 14:27:56 +00:00
|
|
|
/* disable PSC completely */
|
2014-07-23 14:36:26 +00:00
|
|
|
__raw_writel(0, AC97_CFG(wd));
|
|
|
|
wmb(); /* drain writebuffer */
|
|
|
|
__raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
|
|
|
|
wmb(); /* drain writebuffer */
|
2008-07-09 14:27:56 +00:00
|
|
|
|
2009-10-31 19:15:08 +00:00
|
|
|
au1xpsc_ac97_workdata = NULL; /* MDEV */
|
|
|
|
|
|
|
|
return 0;
|
2008-07-09 14:27:56 +00:00
|
|
|
}
|
|
|
|
|
2009-10-31 19:15:08 +00:00
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static int au1xpsc_ac97_drvsuspend(struct device *dev)
|
2008-07-09 14:27:56 +00:00
|
|
|
{
|
2009-10-31 19:15:08 +00:00
|
|
|
struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
|
|
|
|
|
2008-07-09 14:27:56 +00:00
|
|
|
/* save interesting registers and disable PSC */
|
2014-07-23 14:36:26 +00:00
|
|
|
wd->pm[0] = __raw_readl(PSC_SEL(wd));
|
2008-07-09 14:27:56 +00:00
|
|
|
|
2014-07-23 14:36:26 +00:00
|
|
|
__raw_writel(0, AC97_CFG(wd));
|
|
|
|
wmb(); /* drain writebuffer */
|
|
|
|
__raw_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
|
|
|
|
wmb(); /* drain writebuffer */
|
2008-07-09 14:27:56 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-10-31 19:15:08 +00:00
|
|
|
static int au1xpsc_ac97_drvresume(struct device *dev)
|
2008-07-09 14:27:56 +00:00
|
|
|
{
|
2009-10-31 19:15:08 +00:00
|
|
|
struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
|
|
|
|
|
2008-07-09 14:27:56 +00:00
|
|
|
/* restore PSC clock config */
|
2014-07-23 14:36:26 +00:00
|
|
|
__raw_writel(wd->pm[0] | PSC_SEL_PS_AC97MODE, PSC_SEL(wd));
|
|
|
|
wmb(); /* drain writebuffer */
|
2008-07-09 14:27:56 +00:00
|
|
|
|
|
|
|
/* after this point the ac97 core will cold-reset the codec.
|
|
|
|
* During cold-reset the PSC is reinitialized and the last
|
|
|
|
* configuration set up in hw_params() is restored.
|
|
|
|
*/
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-10-31 19:15:08 +00:00
|
|
|
static struct dev_pm_ops au1xpscac97_pmops = {
|
|
|
|
.suspend = au1xpsc_ac97_drvsuspend,
|
|
|
|
.resume = au1xpsc_ac97_drvresume,
|
2009-03-03 01:41:00 +00:00
|
|
|
};
|
|
|
|
|
2009-10-31 19:15:08 +00:00
|
|
|
#define AU1XPSCAC97_PMOPS &au1xpscac97_pmops
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
#define AU1XPSCAC97_PMOPS NULL
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static struct platform_driver au1xpsc_ac97_driver = {
|
|
|
|
.driver = {
|
2010-08-26 12:53:51 +00:00
|
|
|
.name = "au1xpsc_ac97",
|
2009-10-31 19:15:08 +00:00
|
|
|
.owner = THIS_MODULE,
|
|
|
|
.pm = AU1XPSCAC97_PMOPS,
|
2008-07-09 14:27:56 +00:00
|
|
|
},
|
2009-10-31 19:15:08 +00:00
|
|
|
.probe = au1xpsc_ac97_drvprobe,
|
2012-12-07 14:26:22 +00:00
|
|
|
.remove = au1xpsc_ac97_drvremove,
|
2008-07-09 14:27:56 +00:00
|
|
|
};
|
|
|
|
|
2013-06-26 10:28:59 +00:00
|
|
|
module_platform_driver(au1xpsc_ac97_driver);
|
2008-07-09 14:27:56 +00:00
|
|
|
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver");
|
2009-10-31 19:15:08 +00:00
|
|
|
MODULE_AUTHOR("Manuel Lauss");
|
|
|
|
|