2007-09-30 19:35:09 +00:00
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/*
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* arch/arm/mach-ns9xxx/gpio.c
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*
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* Copyright (C) 2006 by Digi International Inc.
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*/
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#include <linux/compiler.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/module.h>
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#include <asm/arch-ns9xxx/gpio.h>
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#include <asm/arch-ns9xxx/processor.h>
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#include <asm/arch-ns9xxx/regs-bbu.h>
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2007-09-30 19:36:33 +00:00
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#include <asm/io.h>
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2007-09-30 19:35:09 +00:00
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#include <asm/bug.h>
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#include <asm/types.h>
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#include <asm/bitops.h>
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#if defined(CONFIG_PROCESSOR_NS9360)
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#define GPIO_MAX 72
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#elif defined(CONFIG_PROCESSOR_NS9750)
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#define GPIO_MAX 49
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#endif
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/* protects BBU_GCONFx and BBU_GCTRLx */
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static spinlock_t gpio_lock = __SPIN_LOCK_UNLOCKED(gpio_lock);
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/* only access gpiores with atomic ops */
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static DECLARE_BITMAP(gpiores, GPIO_MAX);
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static inline int ns9xxx_valid_gpio(unsigned gpio)
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{
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#if defined(CONFIG_PROCESSOR_NS9360)
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if (processor_is_ns9360())
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return gpio <= 72;
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else
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#endif
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#if defined(CONFIG_PROCESSOR_NS9750)
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if (processor_is_ns9750())
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return gpio <= 49;
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else
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#endif
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BUG();
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}
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2007-09-30 19:36:33 +00:00
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static inline void __iomem *ns9xxx_gpio_get_gconfaddr(unsigned gpio)
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2007-09-30 19:35:09 +00:00
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{
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if (gpio < 56)
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2007-09-30 19:36:33 +00:00
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return BBU_GCONFb1(gpio / 8);
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2007-09-30 19:35:09 +00:00
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else
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/*
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* this could be optimised away on
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* ns9750 only builds, but it isn't ...
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*/
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2007-09-30 19:36:33 +00:00
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return BBU_GCONFb2((gpio - 56) / 8);
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2007-09-30 19:35:09 +00:00
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}
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2007-09-30 19:36:33 +00:00
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static inline void __iomem *ns9xxx_gpio_get_gctrladdr(unsigned gpio)
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2007-09-30 19:35:09 +00:00
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{
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if (gpio < 32)
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2007-09-30 19:36:33 +00:00
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return BBU_GCTRL1;
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2007-09-30 19:35:09 +00:00
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else if (gpio < 64)
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2007-09-30 19:36:33 +00:00
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return BBU_GCTRL2;
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2007-09-30 19:35:09 +00:00
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else
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/* this could be optimised away on ns9750 only builds */
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2007-09-30 19:36:33 +00:00
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return BBU_GCTRL3;
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2007-09-30 19:35:09 +00:00
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}
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2007-09-30 19:36:33 +00:00
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static inline void __iomem *ns9xxx_gpio_get_gstataddr(unsigned gpio)
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2007-09-30 19:35:09 +00:00
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{
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if (gpio < 32)
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2007-09-30 19:36:33 +00:00
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return BBU_GSTAT1;
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2007-09-30 19:35:09 +00:00
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else if (gpio < 64)
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2007-09-30 19:36:33 +00:00
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return BBU_GSTAT2;
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2007-09-30 19:35:09 +00:00
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else
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/* this could be optimised away on ns9750 only builds */
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2007-09-30 19:36:33 +00:00
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return BBU_GSTAT3;
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2007-09-30 19:35:09 +00:00
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}
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int gpio_request(unsigned gpio, const char *label)
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{
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if (likely(ns9xxx_valid_gpio(gpio)))
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return test_and_set_bit(gpio, gpiores) ? -EBUSY : 0;
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else
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return -EINVAL;
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}
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EXPORT_SYMBOL(gpio_request);
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void gpio_free(unsigned gpio)
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{
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clear_bit(gpio, gpiores);
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return;
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}
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EXPORT_SYMBOL(gpio_free);
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/*
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* each gpio can serve for 4 different purposes [0..3]. These are called
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* "functions" and passed in the parameter func. Functions 0-2 are always some
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* special things, function 3 is GPIO. If func == 3 dir specifies input or
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* output, and with inv you can enable an inverter (independent of func).
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*/
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static int __ns9xxx_gpio_configure(unsigned gpio, int dir, int inv, int func)
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{
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2007-09-30 19:36:33 +00:00
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void __iomem *conf = ns9xxx_gpio_get_gconfaddr(gpio);
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2007-09-30 19:35:09 +00:00
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u32 confval;
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unsigned long flags;
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spin_lock_irqsave(&gpio_lock, flags);
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2007-09-30 19:36:33 +00:00
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confval = __raw_readl(conf);
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2007-09-30 19:35:09 +00:00
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REGSETIM_IDX(confval, BBU_GCONFx, DIR, gpio & 7, dir);
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REGSETIM_IDX(confval, BBU_GCONFx, INV, gpio & 7, inv);
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REGSETIM_IDX(confval, BBU_GCONFx, FUNC, gpio & 7, func);
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2007-09-30 19:36:33 +00:00
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__raw_writel(confval, conf);
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2007-09-30 19:35:09 +00:00
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spin_unlock_irqrestore(&gpio_lock, flags);
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return 0;
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}
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int ns9xxx_gpio_configure(unsigned gpio, int inv, int func)
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{
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if (likely(ns9xxx_valid_gpio(gpio))) {
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if (func == 3) {
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printk(KERN_WARNING "use gpio_direction_input "
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"or gpio_direction_output\n");
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return -EINVAL;
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} else
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return __ns9xxx_gpio_configure(gpio, 0, inv, func);
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} else
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return -EINVAL;
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}
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EXPORT_SYMBOL(ns9xxx_gpio_configure);
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int gpio_direction_input(unsigned gpio)
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{
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if (likely(ns9xxx_valid_gpio(gpio))) {
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return __ns9xxx_gpio_configure(gpio, 0, 0, 3);
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} else
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return -EINVAL;
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}
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EXPORT_SYMBOL(gpio_direction_input);
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int gpio_direction_output(unsigned gpio, int value)
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{
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if (likely(ns9xxx_valid_gpio(gpio))) {
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gpio_set_value(gpio, value);
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return __ns9xxx_gpio_configure(gpio, 1, 0, 3);
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} else
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return -EINVAL;
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}
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EXPORT_SYMBOL(gpio_direction_output);
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int gpio_get_value(unsigned gpio)
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{
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2007-09-30 19:36:33 +00:00
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void __iomem *stat = ns9xxx_gpio_get_gstataddr(gpio);
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2007-09-30 19:35:09 +00:00
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int ret;
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2007-09-30 19:36:33 +00:00
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ret = 1 & (__raw_readl(stat) >> (gpio & 31));
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2007-09-30 19:35:09 +00:00
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return ret;
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}
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EXPORT_SYMBOL(gpio_get_value);
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void gpio_set_value(unsigned gpio, int value)
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{
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2007-09-30 19:36:33 +00:00
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void __iomem *ctrl = ns9xxx_gpio_get_gctrladdr(gpio);
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u32 ctrlval;
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2007-09-30 19:35:09 +00:00
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unsigned long flags;
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spin_lock_irqsave(&gpio_lock, flags);
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2007-09-30 19:36:33 +00:00
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ctrlval = __raw_readl(ctrl);
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2007-09-30 19:35:09 +00:00
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if (value)
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2007-09-30 19:36:33 +00:00
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ctrlval |= 1 << (gpio & 31);
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2007-09-30 19:35:09 +00:00
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else
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2007-09-30 19:36:33 +00:00
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ctrlval &= ~(1 << (gpio & 31));
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__raw_writel(ctrlval, ctrl);
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2007-09-30 19:35:09 +00:00
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spin_unlock_irqrestore(&gpio_lock, flags);
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}
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EXPORT_SYMBOL(gpio_set_value);
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