2005-09-07 16:20:27 +00:00
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#ifndef __ASM_ARCH_OMAP24XX_H
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#define __ASM_ARCH_OMAP24XX_H
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2005-11-10 14:26:53 +00:00
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/*
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* Please place only base defines here and put the rest in device
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* specific headers. Note also that some of these defines are needed
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* for omap1 to compile without adding ifdefs.
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*/
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#define L4_24XX_BASE 0x48000000
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2006-12-07 01:14:05 +00:00
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#define L4_WK_243X_BASE 0x49000000
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2005-11-10 14:26:53 +00:00
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#define L3_24XX_BASE 0x68000000
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2005-09-07 16:20:27 +00:00
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/* interrupt controller */
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2005-11-10 14:26:53 +00:00
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#define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
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2005-09-07 16:20:27 +00:00
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#define VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE)
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#define OMAP24XX_IVA_INTC_BASE 0x40000000
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#define IRQ_SIR_IRQ 0x0040
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2006-12-07 01:14:05 +00:00
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#ifdef CONFIG_ARCH_OMAP2420
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2005-11-10 14:26:53 +00:00
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#define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
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#define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000)
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#define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000)
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2006-12-07 01:14:05 +00:00
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#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8)
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#endif
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#ifdef CONFIG_ARCH_OMAP2430
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#define OMAP24XX_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000)
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#define OMAP24XX_PRCM_BASE (L4_WK_243X_BASE + 0x6000)
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#define OMAP24XX_SDRC_BASE (0x6D000000)
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#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8)
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#define OMAP243X_GPMC_BASE 0x6E000000
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#endif
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2005-11-10 14:26:53 +00:00
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2006-12-07 21:57:38 +00:00
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/* DSP SS */
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#define OMAP24XX_DSP_BASE 0x58000000
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#define OMAP24XX_DSP_MEM_BASE (OMAP24XX_DSP_BASE + 0x0)
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#define OMAP24XX_DSP_IPI_BASE (OMAP24XX_DSP_BASE + 0x1000000)
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#define OMAP24XX_DSP_MMU_BASE (OMAP24XX_DSP_BASE + 0x2000000)
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/* Mailbox */
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#define OMAP24XX_MAILBOX_BASE (L4_24XX_BASE + 0x94000)
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2005-09-07 16:20:27 +00:00
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#endif /* __ASM_ARCH_OMAP24XX_H */
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