393 lines
9.1 KiB
ArmAsm
393 lines
9.1 KiB
ArmAsm
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright SUSE Linux Products GmbH 2009
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*
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* Authors: Alexander Graf <agraf@suse.de>
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*/
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#include <asm/ppc_asm.h>
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#include <asm/kvm_asm.h>
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#include <asm/reg.h>
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#include <asm/page.h>
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#include <asm/asm-offsets.h>
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#include <asm/exception-64s.h>
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#define KVMPPC_HANDLE_EXIT .kvmppc_handle_exit
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#define ULONG_SIZE 8
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#define VCPU_GPR(n) (VCPU_GPRS + (n * ULONG_SIZE))
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.macro mfpaca tmp_reg, src_reg, offset, vcpu_reg
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ld \tmp_reg, (PACA_EXMC+\offset)(r13)
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std \tmp_reg, VCPU_GPR(\src_reg)(\vcpu_reg)
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.endm
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.macro DISABLE_INTERRUPTS
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mfmsr r0
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rldicl r0,r0,48,1
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rotldi r0,r0,16
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mtmsrd r0,1
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.endm
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/*****************************************************************************
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* *
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* Guest entry / exit code that is in kernel module memory (highmem) *
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* *
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****************************************************************************/
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/* Registers:
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* r3: kvm_run pointer
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* r4: vcpu pointer
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*/
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_GLOBAL(__kvmppc_vcpu_entry)
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kvm_start_entry:
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/* Write correct stack frame */
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mflr r0
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std r0,16(r1)
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/* Save host state to the stack */
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stdu r1, -SWITCH_FRAME_SIZE(r1)
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/* Save r3 (kvm_run) and r4 (vcpu) */
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SAVE_2GPRS(3, r1)
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/* Save non-volatile registers (r14 - r31) */
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SAVE_NVGPRS(r1)
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/* Save LR */
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mflr r14
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std r14, _LINK(r1)
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/* XXX optimize non-volatile loading away */
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kvm_start_lightweight:
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DISABLE_INTERRUPTS
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/* Save R1/R2 in the PACA */
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std r1, PACAR1(r13)
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std r2, (PACA_EXMC+EX_SRR0)(r13)
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ld r3, VCPU_HIGHMEM_HANDLER(r4)
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std r3, PACASAVEDMSR(r13)
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/* Load non-volatile guest state from the vcpu */
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ld r14, VCPU_GPR(r14)(r4)
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ld r15, VCPU_GPR(r15)(r4)
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ld r16, VCPU_GPR(r16)(r4)
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ld r17, VCPU_GPR(r17)(r4)
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ld r18, VCPU_GPR(r18)(r4)
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ld r19, VCPU_GPR(r19)(r4)
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ld r20, VCPU_GPR(r20)(r4)
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ld r21, VCPU_GPR(r21)(r4)
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ld r22, VCPU_GPR(r22)(r4)
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ld r23, VCPU_GPR(r23)(r4)
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ld r24, VCPU_GPR(r24)(r4)
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ld r25, VCPU_GPR(r25)(r4)
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ld r26, VCPU_GPR(r26)(r4)
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ld r27, VCPU_GPR(r27)(r4)
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ld r28, VCPU_GPR(r28)(r4)
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ld r29, VCPU_GPR(r29)(r4)
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ld r30, VCPU_GPR(r30)(r4)
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ld r31, VCPU_GPR(r31)(r4)
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ld r9, VCPU_PC(r4) /* r9 = vcpu->arch.pc */
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ld r10, VCPU_SHADOW_MSR(r4) /* r10 = vcpu->arch.shadow_msr */
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ld r3, VCPU_TRAMPOLINE_ENTER(r4)
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mtsrr0 r3
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LOAD_REG_IMMEDIATE(r3, MSR_KERNEL & ~(MSR_IR | MSR_DR))
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mtsrr1 r3
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/* Load guest state in the respective registers */
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lwz r3, VCPU_CR(r4) /* r3 = vcpu->arch.cr */
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stw r3, (PACA_EXMC + EX_CCR)(r13)
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ld r3, VCPU_CTR(r4) /* r3 = vcpu->arch.ctr */
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mtctr r3 /* CTR = r3 */
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ld r3, VCPU_LR(r4) /* r3 = vcpu->arch.lr */
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mtlr r3 /* LR = r3 */
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ld r3, VCPU_XER(r4) /* r3 = vcpu->arch.xer */
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std r3, (PACA_EXMC + EX_R3)(r13)
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/* Some guests may need to have dcbz set to 32 byte length.
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*
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* Usually we ensure that by patching the guest's instructions
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* to trap on dcbz and emulate it in the hypervisor.
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*
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* If we can, we should tell the CPU to use 32 byte dcbz though,
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* because that's a lot faster.
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*/
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ld r3, VCPU_HFLAGS(r4)
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rldicl. r3, r3, 0, 63 /* CR = ((r3 & 1) == 0) */
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beq no_dcbz32_on
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mfspr r3,SPRN_HID5
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ori r3, r3, 0x80 /* XXX HID5_dcbz32 = 0x80 */
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mtspr SPRN_HID5,r3
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no_dcbz32_on:
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/* Load guest GPRs */
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ld r3, VCPU_GPR(r9)(r4)
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std r3, (PACA_EXMC + EX_R9)(r13)
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ld r3, VCPU_GPR(r10)(r4)
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std r3, (PACA_EXMC + EX_R10)(r13)
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ld r3, VCPU_GPR(r11)(r4)
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std r3, (PACA_EXMC + EX_R11)(r13)
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ld r3, VCPU_GPR(r12)(r4)
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std r3, (PACA_EXMC + EX_R12)(r13)
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ld r3, VCPU_GPR(r13)(r4)
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std r3, (PACA_EXMC + EX_R13)(r13)
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ld r0, VCPU_GPR(r0)(r4)
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ld r1, VCPU_GPR(r1)(r4)
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ld r2, VCPU_GPR(r2)(r4)
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ld r3, VCPU_GPR(r3)(r4)
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ld r5, VCPU_GPR(r5)(r4)
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ld r6, VCPU_GPR(r6)(r4)
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ld r7, VCPU_GPR(r7)(r4)
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ld r8, VCPU_GPR(r8)(r4)
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ld r4, VCPU_GPR(r4)(r4)
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/* This sets the Magic value for the trampoline */
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li r11, 1
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stb r11, PACA_KVM_IN_GUEST(r13)
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/* Jump to SLB patching handlder and into our guest */
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RFI
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/*
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* This is the handler in module memory. It gets jumped at from the
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* lowmem trampoline code, so it's basically the guest exit code.
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*
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*/
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.global kvmppc_handler_highmem
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kvmppc_handler_highmem:
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/*
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* Register usage at this point:
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*
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* R00 = guest R13
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* R01 = host R1
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* R02 = host R2
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* R10 = guest PC
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* R11 = guest MSR
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* R12 = exit handler id
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* R13 = PACA
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* PACA.exmc.R9 = guest R1
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* PACA.exmc.R10 = guest R10
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* PACA.exmc.R11 = guest R11
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* PACA.exmc.R12 = guest R12
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* PACA.exmc.R13 = guest R2
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* PACA.exmc.DAR = guest DAR
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* PACA.exmc.DSISR = guest DSISR
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* PACA.exmc.LR = guest instruction
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* PACA.exmc.CCR = guest CR
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* PACA.exmc.SRR0 = guest R0
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*
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*/
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std r3, (PACA_EXMC+EX_R3)(r13)
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/* save the exit id in R3 */
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mr r3, r12
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/* R12 = vcpu */
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ld r12, GPR4(r1)
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/* Now save the guest state */
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std r0, VCPU_GPR(r13)(r12)
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std r4, VCPU_GPR(r4)(r12)
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std r5, VCPU_GPR(r5)(r12)
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std r6, VCPU_GPR(r6)(r12)
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std r7, VCPU_GPR(r7)(r12)
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std r8, VCPU_GPR(r8)(r12)
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std r9, VCPU_GPR(r9)(r12)
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/* get registers from PACA */
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mfpaca r5, r0, EX_SRR0, r12
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mfpaca r5, r3, EX_R3, r12
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mfpaca r5, r1, EX_R9, r12
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mfpaca r5, r10, EX_R10, r12
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mfpaca r5, r11, EX_R11, r12
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mfpaca r5, r12, EX_R12, r12
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mfpaca r5, r2, EX_R13, r12
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lwz r5, (PACA_EXMC+EX_LR)(r13)
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stw r5, VCPU_LAST_INST(r12)
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lwz r5, (PACA_EXMC+EX_CCR)(r13)
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stw r5, VCPU_CR(r12)
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ld r5, VCPU_HFLAGS(r12)
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rldicl. r5, r5, 0, 63 /* CR = ((r5 & 1) == 0) */
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beq no_dcbz32_off
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mfspr r5,SPRN_HID5
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rldimi r5,r5,6,56
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mtspr SPRN_HID5,r5
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no_dcbz32_off:
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/* XXX maybe skip on lightweight? */
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std r14, VCPU_GPR(r14)(r12)
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std r15, VCPU_GPR(r15)(r12)
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std r16, VCPU_GPR(r16)(r12)
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std r17, VCPU_GPR(r17)(r12)
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std r18, VCPU_GPR(r18)(r12)
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std r19, VCPU_GPR(r19)(r12)
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std r20, VCPU_GPR(r20)(r12)
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std r21, VCPU_GPR(r21)(r12)
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std r22, VCPU_GPR(r22)(r12)
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std r23, VCPU_GPR(r23)(r12)
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std r24, VCPU_GPR(r24)(r12)
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std r25, VCPU_GPR(r25)(r12)
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std r26, VCPU_GPR(r26)(r12)
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std r27, VCPU_GPR(r27)(r12)
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std r28, VCPU_GPR(r28)(r12)
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std r29, VCPU_GPR(r29)(r12)
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std r30, VCPU_GPR(r30)(r12)
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std r31, VCPU_GPR(r31)(r12)
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/* Restore non-volatile host registers (r14 - r31) */
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REST_NVGPRS(r1)
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/* Save guest PC (R10) */
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std r10, VCPU_PC(r12)
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/* Save guest msr (R11) */
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std r11, VCPU_SHADOW_MSR(r12)
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/* Save guest CTR (in R12) */
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mfctr r5
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std r5, VCPU_CTR(r12)
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/* Save guest LR */
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mflr r5
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std r5, VCPU_LR(r12)
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/* Save guest XER */
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mfxer r5
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std r5, VCPU_XER(r12)
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/* Save guest DAR */
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ld r5, (PACA_EXMC+EX_DAR)(r13)
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std r5, VCPU_FAULT_DEAR(r12)
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/* Save guest DSISR */
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lwz r5, (PACA_EXMC+EX_DSISR)(r13)
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std r5, VCPU_FAULT_DSISR(r12)
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/* Restore host msr -> SRR1 */
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ld r7, VCPU_HOST_MSR(r12)
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mtsrr1 r7
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/* Restore host IP -> SRR0 */
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ld r6, VCPU_HOST_RETIP(r12)
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mtsrr0 r6
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/*
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* For some interrupts, we need to call the real Linux
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* handler, so it can do work for us. This has to happen
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* as if the interrupt arrived from the kernel though,
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* so let's fake it here where most state is restored.
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*
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* Call Linux for hardware interrupts/decrementer
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* r3 = address of interrupt handler (exit reason)
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*/
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cmpwi r3, BOOK3S_INTERRUPT_EXTERNAL
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beq call_linux_handler
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cmpwi r3, BOOK3S_INTERRUPT_DECREMENTER
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beq call_linux_handler
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/* Back to Interruptable Mode! (goto kvm_return_point) */
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RFI
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call_linux_handler:
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/*
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* If we land here we need to jump back to the handler we
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* came from.
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*
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* We have a page that we can access from real mode, so let's
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* jump back to that and use it as a trampoline to get back into the
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* interrupt handler!
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*
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* R3 still contains the exit code,
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* R6 VCPU_HOST_RETIP and
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* R7 VCPU_HOST_MSR
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*/
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mtlr r3
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ld r5, VCPU_TRAMPOLINE_LOWMEM(r12)
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mtsrr0 r5
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LOAD_REG_IMMEDIATE(r5, MSR_KERNEL & ~(MSR_IR | MSR_DR))
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mtsrr1 r5
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RFI
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.global kvm_return_point
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kvm_return_point:
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||
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/* Jump back to lightweight entry if we're supposed to */
|
||
|
|
/* go back into the guest */
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||
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mr r5, r3
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/* Restore r3 (kvm_run) and r4 (vcpu) */
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REST_2GPRS(3, r1)
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bl KVMPPC_HANDLE_EXIT
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||
|
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#if 0 /* XXX get lightweight exits back */
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|
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cmpwi r3, RESUME_GUEST
|
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|
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bne kvm_exit_heavyweight
|
||
|
|
|
||
|
|
/* put VCPU and KVM_RUN back into place and roll again! */
|
||
|
|
REST_2GPRS(3, r1)
|
||
|
|
b kvm_start_lightweight
|
||
|
|
|
||
|
|
kvm_exit_heavyweight:
|
||
|
|
/* Restore non-volatile host registers */
|
||
|
|
ld r14, _LINK(r1)
|
||
|
|
mtlr r14
|
||
|
|
REST_NVGPRS(r1)
|
||
|
|
|
||
|
|
addi r1, r1, SWITCH_FRAME_SIZE
|
||
|
|
#else
|
||
|
|
ld r4, _LINK(r1)
|
||
|
|
mtlr r4
|
||
|
|
|
||
|
|
cmpwi r3, RESUME_GUEST
|
||
|
|
bne kvm_exit_heavyweight
|
||
|
|
|
||
|
|
REST_2GPRS(3, r1)
|
||
|
|
|
||
|
|
addi r1, r1, SWITCH_FRAME_SIZE
|
||
|
|
|
||
|
|
b kvm_start_entry
|
||
|
|
|
||
|
|
kvm_exit_heavyweight:
|
||
|
|
|
||
|
|
addi r1, r1, SWITCH_FRAME_SIZE
|
||
|
|
#endif
|
||
|
|
|
||
|
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