76 lines
2.6 KiB
C
76 lines
2.6 KiB
C
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/*
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* Hardware info common to DECstation 5000/1xx systems (otherwise
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* known as 3min or kn02ba) and Personal DECstations 5000/xx ones
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* (otherwise known as maxine or kn02ca).
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
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* are by courtesy of Chris Fraser.
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* Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki
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*
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* These are addresses which have to be known early in the boot process.
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* For other addresses refer to tc.h, ioasic_addrs.h and friends.
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*/
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#ifndef __ASM_MIPS_DEC_KN02XA_H
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#define __ASM_MIPS_DEC_KN02XA_H
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#include <asm/addrspace.h>
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#include <asm/dec/ioasic_addrs.h>
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#define KN02XA_SLOT_BASE KSEG1ADDR(0x1c000000)
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/*
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* Some port addresses...
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*/
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#define KN02XA_IOASIC_BASE (KN02XA_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */
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#define KN02XA_RTC_BASE (KN02XA_SLOT_BASE + IOASIC_TOY) /* RTC */
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/*
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* Memory control ASIC registers.
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*/
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#define KN02XA_MER KSEG1ADDR(0x0c400000) /* memory error register */
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#define KN02XA_MSR KSEG1ADDR(0x0c800000) /* memory size register */
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/*
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* CPU control ASIC registers.
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*/
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#define KN02XA_MEM_CONF KSEG1ADDR(0x0e000000) /* write timeout config */
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#define KN02XA_EAR KSEG1ADDR(0x0e000004) /* error address register */
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#define KN02XA_BOOT0 KSEG1ADDR(0x0e000008) /* boot 0 register */
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#define KN02XA_MEM_INTR KSEG1ADDR(0x0e00000c) /* write err IRQ stat & ack */
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/*
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* Memory Error Register bits, common definitions.
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* The rest is defined in system-specific headers.
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*/
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#define KN02XA_MER_RES_28 (0xf<<28) /* unused */
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#define KN02XA_MER_RES_17 (0x3ff<<17) /* unused */
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#define KN02XA_MER_PAGERR (1<<16) /* 2k page boundary error */
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#define KN02XA_MER_TRANSERR (1<<15) /* transfer length error */
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#define KN02XA_MER_PARDIS (1<<14) /* parity error disable */
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#define KN02XA_MER_RES_12 (0x3<<12) /* unused */
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#define KN02XA_MER_BYTERR (0xf<<8) /* byte lane error bitmask */
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#define KN02XA_MER_RES_0 (0xff<<0) /* unused */
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/*
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* Memory Size Register bits, common definitions.
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* The rest is defined in system-specific headers.
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*/
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#define KN02XA_MSR_RES_27 (0x1f<<27) /* unused */
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#define KN02XA_MSR_RES_14 (0x7<<14) /* unused */
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#define KN02XA_MSR_SIZE (1<<13) /* 16M/4M stride */
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#define KN02XA_MSR_RES_0 (0x1fff<<0) /* unused */
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/*
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* Error Address Register bits.
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*/
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#define KN02XA_EAR_RES_29 (0x7<<29) /* unused */
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#define KN02XA_EAR_ADDRESS (0x7ffffff<<2) /* address involved */
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#define KN02XA_EAR_RES_0 (0x3<<0) /* unused */
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#endif /* __ASM_MIPS_DEC_KN02XA_H */
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