2005-04-16 22:20:36 +00:00
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/*
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* Copyright (c) by Jaroslav Kysela <perex@suse.cz>
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* Creative Labs, Inc.
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* Routines for IRQ control of EMU10K1 chips
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*
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* BUGS:
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* --
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*
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* TODO:
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* --
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <sound/driver.h>
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#include <linux/time.h>
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#include <sound/core.h>
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#include <sound/emu10k1.h>
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irqreturn_t snd_emu10k1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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2005-11-17 13:50:13 +00:00
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struct snd_emu10k1 *emu = dev_id;
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2005-04-16 22:20:36 +00:00
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unsigned int status, status2, orig_status, orig_status2;
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int handled = 0;
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while ((status = inl(emu->port + IPR)) != 0) {
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2005-03-26 18:35:29 +00:00
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//printk("emu10k1 irq - status = 0x%x\n", status);
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2005-04-16 22:20:36 +00:00
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orig_status = status;
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handled = 1;
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if (status & IPR_PCIERROR) {
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2005-10-20 16:26:44 +00:00
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snd_printk(KERN_ERR "interrupt: PCI error\n");
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2005-04-16 22:20:36 +00:00
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snd_emu10k1_intr_disable(emu, INTE_PCIERRORENABLE);
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status &= ~IPR_PCIERROR;
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}
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if (status & (IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE)) {
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if (emu->hwvol_interrupt)
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emu->hwvol_interrupt(emu, status);
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else
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snd_emu10k1_intr_disable(emu, INTE_VOLINCRENABLE|INTE_VOLDECRENABLE|INTE_MUTEENABLE);
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status &= ~(IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE);
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}
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if (status & IPR_CHANNELLOOP) {
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int voice;
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int voice_max = status & IPR_CHANNELNUMBERMASK;
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u32 val;
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2005-11-17 13:50:13 +00:00
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struct snd_emu10k1_voice *pvoice = emu->voices;
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2005-04-16 22:20:36 +00:00
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val = snd_emu10k1_ptr_read(emu, CLIPL, 0);
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for (voice = 0; voice <= voice_max; voice++) {
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if (voice == 0x20)
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val = snd_emu10k1_ptr_read(emu, CLIPH, 0);
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if (val & 1) {
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if (pvoice->use && pvoice->interrupt != NULL) {
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pvoice->interrupt(emu, pvoice);
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snd_emu10k1_voice_intr_ack(emu, voice);
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} else {
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snd_emu10k1_voice_intr_disable(emu, voice);
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}
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}
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val >>= 1;
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pvoice++;
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}
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val = snd_emu10k1_ptr_read(emu, HLIPL, 0);
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for (voice = 0; voice <= voice_max; voice++) {
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if (voice == 0x20)
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val = snd_emu10k1_ptr_read(emu, HLIPH, 0);
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if (val & 1) {
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if (pvoice->use && pvoice->interrupt != NULL) {
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pvoice->interrupt(emu, pvoice);
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snd_emu10k1_voice_half_loop_intr_ack(emu, voice);
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} else {
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snd_emu10k1_voice_half_loop_intr_disable(emu, voice);
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}
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}
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val >>= 1;
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pvoice++;
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}
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status &= ~IPR_CHANNELLOOP;
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}
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status &= ~IPR_CHANNELNUMBERMASK;
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if (status & (IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL)) {
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if (emu->capture_interrupt)
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emu->capture_interrupt(emu, status);
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else
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snd_emu10k1_intr_disable(emu, INTE_ADCBUFENABLE);
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status &= ~(IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL);
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}
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if (status & (IPR_MICBUFFULL|IPR_MICBUFHALFFULL)) {
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if (emu->capture_mic_interrupt)
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emu->capture_mic_interrupt(emu, status);
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else
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snd_emu10k1_intr_disable(emu, INTE_MICBUFENABLE);
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status &= ~(IPR_MICBUFFULL|IPR_MICBUFHALFFULL);
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}
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if (status & (IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL)) {
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if (emu->capture_efx_interrupt)
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emu->capture_efx_interrupt(emu, status);
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else
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snd_emu10k1_intr_disable(emu, INTE_EFXBUFENABLE);
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status &= ~(IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL);
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}
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if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
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if (emu->midi.interrupt)
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emu->midi.interrupt(emu, status);
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else
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snd_emu10k1_intr_disable(emu, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
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status &= ~(IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY);
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}
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if (status & (IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2)) {
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if (emu->midi2.interrupt)
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emu->midi2.interrupt(emu, status);
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else
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snd_emu10k1_intr_disable(emu, INTE_A_MIDITXENABLE2|INTE_A_MIDIRXENABLE2);
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status &= ~(IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2);
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}
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if (status & IPR_INTERVALTIMER) {
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if (emu->timer)
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snd_timer_interrupt(emu->timer, emu->timer->sticks);
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else
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snd_emu10k1_intr_disable(emu, INTE_INTERVALTIMERENB);
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status &= ~IPR_INTERVALTIMER;
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}
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if (status & (IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE)) {
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if (emu->spdif_interrupt)
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emu->spdif_interrupt(emu, status);
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else
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snd_emu10k1_intr_disable(emu, INTE_GPSPDIFENABLE|INTE_CDSPDIFENABLE);
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status &= ~(IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE);
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}
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if (status & IPR_FXDSP) {
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if (emu->dsp_interrupt)
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emu->dsp_interrupt(emu);
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else
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snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
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status &= ~IPR_FXDSP;
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}
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2005-03-26 18:35:29 +00:00
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if (status & IPR_P16V) {
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while ((status2 = inl(emu->port + IPR2)) != 0) {
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u32 mask = INTE2_PLAYBACK_CH_0_LOOP; /* Full Loop */
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2005-11-17 13:50:13 +00:00
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struct snd_emu10k1_voice *pvoice = &(emu->p16v_voices[0]);
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struct snd_emu10k1_voice *cvoice = &(emu->p16v_capture_voice);
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2005-03-26 18:35:29 +00:00
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//printk(KERN_INFO "status2=0x%x\n", status2);
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orig_status2 = status2;
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if(status2 & mask) {
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if(pvoice->use) {
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snd_pcm_period_elapsed(pvoice->epcm->substream);
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} else {
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snd_printk(KERN_ERR "p16v: status: 0x%08x, mask=0x%08x, pvoice=%p, use=%d\n", status2, mask, pvoice, pvoice->use);
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}
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}
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if(status2 & 0x110000) {
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//printk(KERN_INFO "capture int found\n");
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if(cvoice->use) {
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//printk(KERN_INFO "capture period_elapsed\n");
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snd_pcm_period_elapsed(cvoice->epcm->substream);
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}
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}
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outl(orig_status2, emu->port + IPR2); /* ack all */
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}
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status &= ~IPR_P16V;
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}
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2005-04-16 22:20:36 +00:00
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if (status) {
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unsigned int bits;
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2005-03-26 18:35:29 +00:00
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snd_printk(KERN_ERR "emu10k1: unhandled interrupt: 0x%08x\n", status);
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2005-04-16 22:20:36 +00:00
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//make sure any interrupts we don't handle are disabled:
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bits = INTE_FXDSPENABLE |
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INTE_PCIERRORENABLE |
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INTE_VOLINCRENABLE |
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INTE_VOLDECRENABLE |
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INTE_MUTEENABLE |
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INTE_MICBUFENABLE |
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INTE_ADCBUFENABLE |
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INTE_EFXBUFENABLE |
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INTE_GPSPDIFENABLE |
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INTE_CDSPDIFENABLE |
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INTE_INTERVALTIMERENB |
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INTE_MIDITXENABLE |
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INTE_MIDIRXENABLE;
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if (emu->audigy)
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bits |= INTE_A_MIDITXENABLE2 | INTE_A_MIDIRXENABLE2;
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snd_emu10k1_intr_disable(emu, bits);
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}
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outl(orig_status, emu->port + IPR); /* ack all */
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}
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return IRQ_RETVAL(handled);
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}
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