2019-05-27 06:55:21 +00:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2016-12-14 08:04:48 +00:00
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/*
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* Copyright (c) 2016 MediaTek Inc.
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* Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
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* Rick Chang <rick.chang@mediatek.com>
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2020-08-14 07:12:00 +00:00
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* Xia Jiang <xia.jiang@mediatek.com>
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2016-12-14 08:04:48 +00:00
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*/
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2020-08-14 07:12:00 +00:00
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#ifndef _MTK_JPEG_DEC_HW_H
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#define _MTK_JPEG_DEC_HW_H
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2016-12-14 08:04:48 +00:00
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#include <media/videobuf2-core.h>
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#include "mtk_jpeg_core.h"
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2020-08-14 07:11:59 +00:00
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#include "mtk_jpeg_dec_reg.h"
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2016-12-14 08:04:48 +00:00
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enum {
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MTK_JPEG_DEC_RESULT_EOF_DONE = 0,
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MTK_JPEG_DEC_RESULT_PAUSE = 1,
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MTK_JPEG_DEC_RESULT_UNDERFLOW = 2,
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MTK_JPEG_DEC_RESULT_OVERFLOW = 3,
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MTK_JPEG_DEC_RESULT_ERROR_BS = 4,
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MTK_JPEG_DEC_RESULT_ERROR_UNKNOWN = 6
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};
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struct mtk_jpeg_dec_param {
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u32 pic_w;
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u32 pic_h;
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u32 dec_w;
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u32 dec_h;
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u32 src_color;
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u32 dst_fourcc;
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u32 mcu_w;
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u32 mcu_h;
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u32 total_mcu;
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u32 unit_num;
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u32 comp_num;
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u32 comp_id[MTK_JPEG_COMP_MAX];
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u32 sampling_w[MTK_JPEG_COMP_MAX];
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u32 sampling_h[MTK_JPEG_COMP_MAX];
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u32 qtbl_num[MTK_JPEG_COMP_MAX];
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u32 blk_num;
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u32 blk_comp[MTK_JPEG_COMP_MAX];
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u32 membership;
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u32 dma_mcu;
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u32 dma_group;
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u32 dma_last_mcu;
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u32 img_stride[MTK_JPEG_COMP_MAX];
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u32 mem_stride[MTK_JPEG_COMP_MAX];
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u32 comp_w[MTK_JPEG_COMP_MAX];
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u32 comp_size[MTK_JPEG_COMP_MAX];
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u32 y_size;
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u32 uv_size;
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u32 dec_size;
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u8 uv_brz_w;
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};
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struct mtk_jpeg_bs {
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dma_addr_t str_addr;
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dma_addr_t end_addr;
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size_t size;
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};
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struct mtk_jpeg_fb {
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dma_addr_t plane_addr[MTK_JPEG_COMP_MAX];
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size_t size;
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};
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int mtk_jpeg_dec_fill_param(struct mtk_jpeg_dec_param *param);
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u32 mtk_jpeg_dec_get_int_status(void __iomem *dec_reg_base);
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u32 mtk_jpeg_dec_enum_result(u32 irq_result);
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void mtk_jpeg_dec_set_config(void __iomem *base,
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struct mtk_jpeg_dec_param *config,
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struct mtk_jpeg_bs *bs,
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struct mtk_jpeg_fb *fb);
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void mtk_jpeg_dec_reset(void __iomem *dec_reg_base);
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void mtk_jpeg_dec_start(void __iomem *dec_reg_base);
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#endif /* _MTK_JPEG_HW_H */
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