27#include "../switchtec_priv.h"
28#include "switchtec/utils.h"
36#define gas_reg_read8(dev, reg) __gas_read8(dev, &dev->gas_map->reg)
37#define gas_reg_read16(dev, reg) __gas_read16(dev, &dev->gas_map->reg)
38#define gas_reg_read32(dev, reg) __gas_read32(dev, &dev->gas_map->reg)
39#define gas_reg_read64(dev, reg) __gas_read64(dev, &dev->gas_map->reg)
41#define gas_reg_write8(dev, val, reg) __gas_write8(dev, val, \
43#define gas_reg_write16(dev, val, reg) __gas_write16(dev, val, \
45#define gas_reg_write32(dev, val, reg) __gas_write32(dev, val, \
47#define gas_reg_write64(dev, val, reg) __gas_write64(dev, val, \
55static int fw_toggle_noretry_subcmds[] = {
59 [MRPC_SECURITY_CONFIG_SET] = {1, 0, NULL},
60 [MRPC_KMSK_ENTRY_SET] = {1, 0, NULL},
61 [MRPC_SECURE_STATE_SET] = {1, 0, NULL},
62 [MRPC_BOOTUP_RESUME] = {1, 0, NULL},
63 [MRPC_DBG_UNLOCK] = {1, 0, NULL},
64 [MRPC_SECURITY_CONFIG_SET_GEN5] = {1, 0, NULL},
65 [MRPC_FW_TX] = {1, 1, fw_toggle_noretry_subcmds},
67static const int gasop_noretry_cmds_count =
sizeof(gasop_noretry_cmds) /
70static inline bool gasop_is_no_retry_cmd(uint32_t cmd,
int subcmd)
74 cmd &= SWITCHTEC_CMD_MASK;
76 if (cmd >= gasop_noretry_cmds_count)
78 if (gasop_noretry_cmds[cmd].no_retry == 0)
80 if (gasop_noretry_cmds[cmd].num_subcmd == 0)
82 for (i = 0; i < gasop_noretry_cmds[cmd].num_subcmd; i++) {
83 if (subcmd == gasop_noretry_cmds[cmd].subcmds[i])
90int gasop_access_check(
struct switchtec_dev *dev)
94 device_id = gas_reg_read32(dev, sys_info.device_id);
100void gasop_set_partition_info(
struct switchtec_dev *dev)
102 dev->partition = gas_reg_read8(dev, top.partition_id);
103 dev->partition_count = gas_reg_read8(dev, top.partition_count);
106int gasop_cmd(
struct switchtec_dev *dev, uint32_t cmd,
107 const void *payload,
size_t payload_len,
void *resp,
110 struct mrpc_regs __gas *mrpc = &dev->gas_map->mrpc;
113 uint8_t subcmd = 0xff;
115 __memcpy_to_gas(dev, &mrpc->input_data, payload, payload_len);
131 subcmd = *(uint8_t*)payload;
132 if (gasop_is_no_retry_cmd(cmd, subcmd))
133 __gas_write32_no_retry(dev, cmd, &mrpc->cmd);
135 __gas_write32(dev, cmd, &mrpc->cmd);
140 status = __gas_read32(dev, &mrpc->status);
141 if (status != SWITCHTEC_MRPC_STATUS_INPROGRESS)
145 if (status == SWITCHTEC_MRPC_STATUS_INTERRUPTED) {
150 if(status == SWITCHTEC_MRPC_STATUS_ERROR) {
151 errno = __gas_read32(dev, &mrpc->ret_value);
155 if (status != SWITCHTEC_MRPC_STATUS_DONE) {
160 ret = __gas_read32(dev, &mrpc->ret_value);
165 __memcpy_from_gas(dev, resp, &mrpc->output_data, resp_len);
170int gasop_get_device_id(
struct switchtec_dev *dev)
172 return gas_reg_read32(dev, sys_info.device_id);
175int gasop_get_fw_version(
struct switchtec_dev *dev,
char *buf,
180 ver = gas_reg_read32(dev, sys_info.firmware_version);
181 version_to_string(ver, buf, buflen);
186int gasop_pff_to_port(
struct switchtec_dev *dev,
int pff,
187 int *partition,
int *port)
195 for (part = 0; part < dev->partition_count; part++) {
196 pcfg = &dev->gas_map->part_cfg[part];
199 reg = __gas_read32(dev, &pcfg->usp_pff_inst_id);
205 reg = __gas_read32(dev, &pcfg->vep_pff_inst_id);
207 *port = SWITCHTEC_PFF_PORT_VEP;
211 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
212 reg = __gas_read32(dev, &pcfg->dsp_pff_inst_id[i]);
228int gasop_port_to_pff(
struct switchtec_dev *dev,
int partition,
234 partition = dev->partition;
235 }
else if (partition >= dev->partition_count) {
240 pcfg = &dev->gas_map->part_cfg[partition];
244 *pff = __gas_read32(dev, &pcfg->usp_pff_inst_id);
246 case SWITCHTEC_PFF_PORT_VEP:
247 *pff = __gas_read32(dev, &pcfg->vep_pff_inst_id);
250 if (port > ARRAY_SIZE(pcfg->dsp_pff_inst_id)) {
255 *pff = __gas_read32(dev, &pcfg->dsp_pff_inst_id[port - 1]);
262static void set_fw_info_part(
struct switchtec_dev *dev,
264 struct partition_info __gas *pi)
266 info->
part_addr = __gas_read32(dev, &pi->address);
267 info->
part_len = __gas_read32(dev, &pi->length);
270int gasop_flash_part(
struct switchtec_dev *dev,
272 enum switchtec_fw_image_part_id_gen3 part)
276 uint32_t active_addr = -1;
279 info->running =
false;
280 info->active =
false;
283 case SWITCHTEC_FW_PART_ID_G3_IMG0:
284 active_addr = __gas_read32(dev, &fi->active_img.address);
285 set_fw_info_part(dev, info, &fi->img0);
287 val = __gas_read16(dev, &si->img_running);
288 if (val == SWITCHTEC_IMG0_RUNNING)
289 info->running =
true;
292 case SWITCHTEC_FW_PART_ID_G3_IMG1:
293 active_addr = __gas_read32(dev, &fi->active_img.address);
294 set_fw_info_part(dev, info, &fi->img1);
296 val = __gas_read16(dev, &si->img_running);
297 if (val == SWITCHTEC_IMG1_RUNNING)
298 info->running =
true;
301 case SWITCHTEC_FW_PART_ID_G3_DAT0:
302 active_addr = __gas_read32(dev, &fi->active_cfg.address);
303 set_fw_info_part(dev, info, &fi->cfg0);
305 val = __gas_read16(dev, &si->cfg_running);
306 if (val == SWITCHTEC_CFG0_RUNNING)
307 info->running =
true;
310 case SWITCHTEC_FW_PART_ID_G3_DAT1:
311 active_addr = __gas_read32(dev, &fi->active_cfg.address);
312 set_fw_info_part(dev, info, &fi->cfg1);
314 val = __gas_read16(dev, &si->cfg_running);
315 if (val == SWITCHTEC_CFG1_RUNNING)
316 info->running =
true;
319 case SWITCHTEC_FW_PART_ID_G3_NVLOG:
320 set_fw_info_part(dev, info, &fi->nvlog);
333int gasop_event_summary(
struct switchtec_dev *dev,
342 memset(sum, 0,
sizeof(*sum));
344 sum->
global = gas_reg_read32(dev, sw_event.global_summary);
345 sum->
part_bitmap = gas_reg_read64(dev, sw_event.part_event_bitmap);
347 for (i = 0; i < dev->partition_count; i++) {
348 reg = gas_reg_read32(dev, part_cfg[i].part_event_summary);
350 if (i == dev->partition)
354 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
355 reg = gas_reg_read16(dev, pff_csr[i].vendor_id);
356 if (reg != MICROSEMI_VENDOR_ID)
359 sum->
pff[i] = gas_reg_read32(dev, pff_csr[i].pff_event_summary);
365static uint32_t __gas *global_ev_reg(
struct switchtec_dev *dev,
366 size_t offset,
int index)
368 return (
void __gas *)&dev->gas_map->sw_event + offset;
371static uint32_t __gas *part_ev_reg(
struct switchtec_dev *dev,
372 size_t offset,
int index)
374 return (
void __gas *)&dev->gas_map->part_cfg[index] + offset;
377static uint32_t __gas *pff_ev_reg(
struct switchtec_dev *dev,
378 size_t offset,
int index)
380 return (
void __gas *)&dev->gas_map->pff_csr[index] + offset;
383#define EV_GLB(i, r)[SWITCHTEC_GLOBAL_EVT_ ## i] = \
384 {offsetof(struct sw_event_regs, r), global_ev_reg}
385#define EV_PAR(i, r)[SWITCHTEC_PART_EVT_ ## i] = \
386 {offsetof(struct part_cfg_regs, r), part_ev_reg}
387#define EV_PFF(i, r)[SWITCHTEC_PFF_EVT_ ## i] = \
388 {offsetof(struct pff_csr_regs, r), pff_ev_reg}
392 uint32_t __gas *(*map_reg)(
struct switchtec_dev *stdev,
393 size_t offset,
int index);
395 EV_GLB(STACK_ERROR, stack_error_event_hdr),
396 EV_GLB(PPU_ERROR, ppu_error_event_hdr),
397 EV_GLB(ISP_ERROR, isp_error_event_hdr),
398 EV_GLB(SYS_RESET, sys_reset_event_hdr),
399 EV_GLB(FW_EXC, fw_exception_hdr),
400 EV_GLB(FW_NMI, fw_nmi_hdr),
401 EV_GLB(FW_NON_FATAL, fw_non_fatal_hdr),
402 EV_GLB(FW_FATAL, fw_fatal_hdr),
403 EV_GLB(TWI_MRPC_COMP, twi_mrpc_comp_hdr),
404 EV_GLB(TWI_MRPC_COMP_ASYNC, twi_mrpc_comp_async_hdr),
405 EV_GLB(CLI_MRPC_COMP, cli_mrpc_comp_hdr),
406 EV_GLB(CLI_MRPC_COMP_ASYNC, cli_mrpc_comp_async_hdr),
407 EV_GLB(GPIO_INT, gpio_interrupt_hdr),
408 EV_GLB(GFMS, gfms_event_hdr),
409 EV_PAR(PART_RESET, part_reset_hdr),
410 EV_PAR(MRPC_COMP, mrpc_comp_hdr),
411 EV_PAR(MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
412 EV_PAR(DYN_PART_BIND_COMP, dyn_binding_hdr),
413 EV_PFF(AER_IN_P2P, aer_in_p2p_hdr),
414 EV_PFF(AER_IN_VEP, aer_in_vep_hdr),
415 EV_PFF(DPC, dpc_hdr),
416 EV_PFF(CTS, cts_hdr),
417 EV_PFF(UEC, uec_hdr),
418 EV_PFF(HOTPLUG, hotplug_hdr),
419 EV_PFF(IER, ier_hdr),
420 EV_PFF(THRESH, threshold_hdr),
421 EV_PFF(POWER_MGMT, power_mgmt_hdr),
422 EV_PFF(TLP_THROTTLING, tlp_throttling_hdr),
423 EV_PFF(FORCE_SPEED, force_speed_hdr),
424 EV_PFF(CREDIT_TIMEOUT, credit_timeout_hdr),
425 EV_PFF(LINK_STATE, link_state_hdr),
428static uint32_t __gas *event_hdr_addr(
struct switchtec_dev *dev,
434 if (e < 0 || e >= SWITCHTEC_MAX_EVENTS)
437 off = event_regs[e].offset;
439 if (event_regs[e].map_reg == part_ev_reg) {
441 index = dev->partition;
442 else if (index >= dev->partition_count)
444 }
else if (event_regs[e].map_reg == pff_ev_reg) {
445 if (index < 0 || index >= SWITCHTEC_MAX_PFF_CSR)
449 return event_regs[e].map_reg(dev, off, index);
453 int index,
int flags, uint32_t data[5])
459 reg = event_hdr_addr(dev, e, index);
465 hdr = __gas_read32(dev, reg);
467 for (i = 0; i < 5; i++)
468 data[i] = __gas_read32(dev, ®[i + 1]);
470 if (!(flags & SWITCHTEC_EVT_FLAG_CLEAR))
471 hdr &= ~SWITCHTEC_EVENT_CLEAR;
472 if (flags & SWITCHTEC_EVT_FLAG_EN_POLL)
473 hdr |= SWITCHTEC_EVENT_EN_IRQ;
474 if (flags & SWITCHTEC_EVT_FLAG_EN_LOG)
475 hdr |= SWITCHTEC_EVENT_EN_LOG;
476 if (flags & SWITCHTEC_EVT_FLAG_EN_CLI)
477 hdr |= SWITCHTEC_EVENT_EN_CLI;
478 if (flags & SWITCHTEC_EVT_FLAG_EN_FATAL)
479 hdr |= SWITCHTEC_EVENT_FATAL;
480 if (flags & SWITCHTEC_EVT_FLAG_DIS_POLL)
481 hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
482 if (flags & SWITCHTEC_EVT_FLAG_DIS_LOG)
483 hdr &= ~SWITCHTEC_EVENT_EN_LOG;
484 if (flags & SWITCHTEC_EVT_FLAG_DIS_CLI)
485 hdr &= ~SWITCHTEC_EVENT_EN_CLI;
486 if (flags & SWITCHTEC_EVT_FLAG_DIS_FATAL)
487 hdr &= ~SWITCHTEC_EVENT_FATAL;
490 __gas_write32(dev, hdr, reg);
492 return (hdr >> 5) & 0xFF;
496 int index,
int flags, uint32_t data[5])
501 if (e >= SWITCHTEC_MAX_EVENTS)
504 if (index == SWITCHTEC_EVT_IDX_ALL) {
505 if (event_regs[e].map_reg == global_ev_reg)
507 else if (event_regs[e].map_reg == part_ev_reg)
508 nr_idxs = dev->partition_count;
509 else if (event_regs[e].map_reg == pff_ev_reg)
510 nr_idxs = gas_reg_read8(dev, top.pff_count);
514 for (index = 0; index < nr_idxs; index++) {
515 ret = event_ctl(dev, e, index, flags, data);
520 ret = event_ctl(dev, e, index, flags, data);
530int gasop_event_wait_for(
struct switchtec_dev *dev,
536 long long start, now;
545 SWITCHTEC_EVT_FLAG_CLEAR |
546 SWITCHTEC_EVT_FLAG_EN_POLL,
551 ret = gettimeofday(&tv, NULL);
555 now = start = ((tv.tv_sec) * 1000 + tv.tv_usec / 1000);
565 ret = gettimeofday(&tv, NULL);
569 now = ((tv.tv_sec) * 1000 + tv.tv_usec / 1000);
571 if (timeout_ms > 0 && now - start >= timeout_ms)
int switchtec_event_ctl(struct switchtec_dev *dev, enum switchtec_event_id e, int index, int flags, uint32_t data[5])
Enable, disable and clear events or retrieve event data.
int switchtec_event_summary_set(struct switchtec_event_summary *sum, enum switchtec_event_id e, int index)
Set a bit corresponding to an event in a summary structure.
int switchtec_event_check(struct switchtec_dev *dev, struct switchtec_event_summary *chk, struct switchtec_event_summary *res)
Check if one or more events have occurred.
uint64_t part_bitmap
Bitmap of partitions with active events.
uint64_t global
Bitmap of global events.
unsigned part[SWITCHTEC_MAX_PARTS]
Bitmap of events in each partition.
unsigned local_part
Bitmap of events in the local partition.
unsigned pff[SWITCHTEC_MAX_PFF_CSR]
Bitmap of events in each port function.
Information about a firmware image or partition.
size_t part_addr
Address of the partition.
size_t part_len
Length of the partition.
switchtec_event_id
Enumeration of all possible events.